United States

In this paper, a novel structure of three-port with zero voltage switching (ZVS) dc-dc converter is proposed. Three-port dc-dc converters are widely applicable in hybrid energy generating systems to provide substantial power to sensitive loads. One of the ports of the proposed converter is interfaced with a storage such as a battery which makes the converter capable of supplying the load even if the main renewable energy supply of the proposed converter (e.g. photovoltaic cells) is not able to generate power. The proposed converter operates in two operations of charging the battery port and the mode when the battery discharges to the load. In addition, it has ZVS operation for all utilized switches and can eliminate the input current ripple. The ZVS of the switches is provided by the leakage inductances of the used coupled inductors. Also, the voltage control of each of the terminals is achieved by three active switches. In this paper, the proposed topology is analyzed theoretically for all operating modes, also, the voltage and current equations of all components are calculated. Furthermore, the required soft switching and zero input currents ripple conditions are analyzed. Finally, the accuracy performance of the proposed converter and the analytical results is verified by the PSCAD/EMTDC simulation and experimental results for 1MHz switching frequency operation. Applying high frequency and using GaN Fets leads to achieve a more compact prototype of the proposed topology.

IEEE WiPDA 2022

Novel High-Voltage-Gain High-Frequency Non-Isolated Three-Port DC-DC Converter with Zero Input Current Ripple and Soft Switching Capability

soft switching capability

converter with zero input current ripple

non-isolated structure

high-voltage-gain

high-frequency

[![](https://assets.underline.io/uploads/markdown_image/1/image/985c8a40b04e56675221c8549975de3c.png)](https://drive.google.com/file/d/1B70nPIeeeqdG4UU70NlYXuKVOHLRuJEo/view?usp=sharing)

### ** History of DRC**
The Device Research Conference (DRC) began in the pre-transistor era with the 1942 establishment of the Conference on Electron Device Research (CEDR). Following William Shockley’s 1948 CEDR presentation of the transistor device, the Solid-State Device Research Conference (SSDRC) was established, with invitation-only attendance.

In the ensuing decades, many exciting firsts were presented at SSDRC, including the use of impurity diffusion in silicon and germanium, the first practical MOSFET, and the first lattice-matched heterojunction.

In 1969, under the leadership or Herbert Kroemer and Cal Quate, the CEDR and SSDRC merged into DRC. In 1970, attendance was opened to all, and the first DRAM (dynamic random-access memory), room temperature lasers, and first CCD (charge-coupled device) were reported—all in the same 1970 DRC meeting!

1976 saw the first official coordination of tandem meetings between DRC and the Electronic Materials Conference (EMC) to bring together the electronic materials and device communities—a custom which persists to this day. In 1991, DRC began publishing its digest with IEEE; they can all be found [here on IEEE Xplore](https://ieeexplore.ieee.org/xpl/conhome/1000199/all-proceedings). Throughout this period, DRC featured reports of many novel and record-setting devices, including the HEMT (High Electron Mobility Transistor), VCSEL (Vertical Cavity Surface Emitting Laser), HBT (Heterojunction Bipolar Transistor), and nanoscale MOSFETs.

In recent years, DRC has continued to be the world’s premier forum to present innovative semiconductor device research with work on organic thin film transistors, graphene and carbon nanotube transistors, and 2D materials all featuring prominently in the 1990s through to the present day. In 2017, we celebrated DRC’s 75th anniversary with special sessions and an [article in the Journal of the Electron Device Society](https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8168249&isnumber=8232486). DRC technical topics continue to evolve with emerging device trends such as memory devices, quantum devices, optoelectronics/photonics, and wide bandgap power devices to reflect the exciting work being done by a diverse community of device engineers around the globe.

Today, as we look forward to the next 75+ years of device innovation, DRC continues to lead the way in showcasing top-caliber research, facilitating vibrant discussion and debate and acting as a platform to nurture the next generation of device engineers. We welcome you to join us at the next DRC!

To learn more about DRC's history, please see [Aaron Franklin, Debdeep Jena and Deji Akinwande, "75 Years of the Device Research Conference—A History Worth Repeating," in IEEE Journal of the Electron Devices Society, vol. 6, pp. 116-120, 2018. doi: 10.1109/JEDS.2017.2780778](https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8168249&isnumber=8232486).

### **Topics**
* Biological Devices
* Devices for Extreme Conditions
* Heterogeneously Integrated Devices
* Memory Devices
* Modeling and Simulation of Devices
* Nanoscale and Vacuum Devices
* Optoelectronic and Optical Devices
* Other Emerging Devices
* Power Devices
* Quantum Devices
* RF and Terahertz Devices
* Spintronic and Magnetic Devices
* Thin-film Devices
* Wide-bandgap Devices
 
### **Invited Speakers**
* Patrick Fay, University of Notre Dame
* Susanne Hoffmann-Eifert, Peter Grünberg Institute
* Sanghyeon Kim, Korea Advanced Institute of Science and Technology
* Sriram Krishnamoorthy, University of California, Santa Barbara
* Mario Lanza, King Abdullah University of Science and Technology
* Xiuling Li, The University of Texas at Austin
* Marko Radosavljevic, Intel Corporation
* Siddharth Rajan, The Ohio State University
* Giordano Scappucci, Delft University of Technology
* Fisher Yu, University of Arkansas
* Wenjuan Zhu, University of Illinois at Urbana-Champaign




Registration is required to attend this event. If you have not already done so, please use the link below to register for a ticket to the conference:

https://www.mrs.org/drc-2022/registration

Registration Is Required

DRC 2022

DRC continues to be the world’s premier forum to present innovative semiconductor device research with work on organic thin film transistors, graphene and carbon nanotube transistors, and 2D materials all featuring prominently in the 1990s through to the present day. In 2017, we celebrated DRC’s 75th anniversary with special sessions and an article in the Journal of the Electron Device Society. 
DRC technical topics continue to evolve with emerging device trends such as memory devices, quantum devices, optoelectronics/photonics, and wide bandgap power devices to reflect the exciting work being done by a diverse community of device engineers around the globe.

technical paper

Download the proceedings [here](https://underline.io/events/372/lounge)
 
 
 The IEEE Workshop on Wide Bandgap Power Devices & Applications (WiPDA) provides a forum for device scientists, circuit designers, & application engineers from the Power Electronics & Electron Devices Societies to share technology updates, research findings, experience & potential applications.
 
 **Topics of interest**
* Heteroepitaxial & Bulk Materials Growth
* Gate Dielectrics & Surface Passivation
* Device Structures & Fabrication Techniques
* Device Characterization & Modeling
* Very-High Efficiency Or Compact Converters
* Safe Operating Areas Of Wide Bandgap Devices, including Short Circuit, Spike, &Transient Tolerance
* Harsh Environment (High Temperature) Operation & Reliability
* Packaging Power Modules & ICs
* Gate Drive & Other Auxiliary Circuits
* High-Performance Passive Components
* Hard-Switched & Soft-Switched Application Analysis
* Applications in Renewable Energy & Energy Storage, Transportation, Industrial Drives, Grid Power Systems, Space and Aerospace
* Wide Bandgap System Design Philosophies & Strategies
* Radio Frequency (RF) GaN
* Technology Roadmap of Wide Bandgap Including Devices, Applications and Packaging

You must register to attend this event. If you haven't done so already, please use the link below to register for the event. All registered attendees will have access to the event site on November 4th.

The IEEE Workshop on Wide Bandgap Power Devices & Applications (WiPDA) provides a forum for device scientists, circuit designers, & application engineers from the Power Electronics & Electron Devices Societies to share technology updates, research findings, experience & potential applications.

In this work an approach for a direct experimental comparison of the application-oriented performance between two high current GaN DC/DC converters based on 7 mΩ, 100 V GaN HEMTs in a commercial off-the-shelf top-cooled package and 5 mΩ, 100 V GaN HEMTs embedded in a thermally-optimized single-chip package is given. The two packaging versions are compared by a maximally identical implementation of the power and gate loops in a 48 V, 300 kHz buck converter with two parallel GaN HEMTs. In the single-chip package the die is directly mounted on a 12×6 mm2 copper-heat spreader offering a significantly lower thermal resistance to heatsink (1.69 K W−1) in comparison to the commercial off-the-shelf version (2.45 K W−1). For a direct benchmark, the COTS-based converter has an identical power-loop to the SCP-version with a novel gate-drive concept. Both versions have an efficiency of 96.8 % at 65 A output current (output power: 1.5 kW), while the commercial off-theshelf version has a better efficiency for lower currents, due to its better hard-switching Figure-of-Merits and therefore lower switching losses and reaches an output current of up to 80 A (output power: 1.75 kW). A detailed analytical loss breakdown for the different transistors in dependence of the temperature and output current is given to proof the measured current point, where the efficiencies of both converters are identical, since the higher switching losses of the SCP version are compensated by lower conduction losses at higher currents and temperatures compared to the smaller COTS transistor. Finally, an outlook on further improvements for reaching higher output currents and potential converters for a more fair comparison of different thermally optimized SMD packages are given.

Comparison of Thermally Optimized SMD Packages for 100 V GaN HEMTs in 300 kHz Buck Converter High Current Applications

With the development of SiC technology, the onresistance of discrete devices drops rapidly and can potentially replace the expensive power modules in high power converters. Unlike parallel discrete devices or a power module with built-in parallel dies, using a single device does not need to slow down the gate driver speed hence can achieve lower switching loss. However, there are still many challenges that need meticulous design considerations. This paper uses the 1200V TO-247-4 package device as an example to provide detailed guidance on device selection, loop optimization, insulation, thermal management, and mounting. A DC-DC converter design example is given with a very low loop inductance and excellent thermal performance. The aircooled hardware demonstrates the hardware limitation is around 40kW in an 800V to 470V buck operation. Normalized to the Ron of the two devices used, this demonstrates an extremely high power density figure of merit of PDFOM=87kW/cm2 .

Design of High Power Converter with Single Low Ron Discrete SiC Device

The purpose of this paper is to investigate the impact of the SiC device packages on the commutation performance characteristics of current-source inverters (CSIs). The parasitic components in the CSI current commutation loop between the two-phase legs and output capacitors have a significant impact on the high-frequency performance of the SiC devices. To meet the elevated current requirements of high-power CSIs, it is often necessary to connect multiple discrete devices in parallel which increases the current commutation loop length. The selection of compact high-power SiC MOSFET and Schottky diode modules instead of discrete devices can be highly desirable to reduce the loop inductance and improve the system performance and power density. Two CSI benchtop prototype units, one with SiC discrete devices and the other with power modules, have been designed and tested, and the performances of the two CSIs are compared. The CSI with SiC power modules significantly reduces the inverter volume and lowers the parasitic inductance by 60% and the voltage ripple amplitude by 20% compared to the CSI unit with discrete devices.

Comparative Investigation of Current-Source Inverters Using SiC Discrete Devices and Power Modules

Medium-voltage (MV) dual-active-bridge (DAB) converters have become an emerging technology thanks to highvoltage silicon carbide (SiC) devices and nanocrystalline magnetic materials. However, the need of phase-shift inductance and insulation requirements for the MV DAB may complicate the design of the transformer and the MV DAB converter, which can also induce higher loss and occupy more space. In this paper, the leakage integration and insulation techniques are discussed for a 6.7-kV/850-V DAB converter, meeting both the inductance and insulation requirements of the MV DAB converter. Ferrite cores with air gaps are inserted between the LV and MV windings without introducing high loss, and the MV winding is selectively shielded to avoid high parasitics and meet the insulation requirement. Test results have verified the effectiveness of this design.

A Medium-Voltage Transformer with Integrated Leakage Inductance for 10 kV SiC-Based Dual-Active-Bridge Converter

Tetra Corporation is developing a pulsed power drilling system for the geothermal industry. The system requires a high temperature switching technology to replace the existing technology based on Si thyristors with a temperature limit of 150°C. This work focuses on the development of such switch based on a Supercascode configuration using SiC JFET technology. The development presented contains thermal models, packaging design and processes, circuit simulations and prototypes of both the Supercascode switch and the high temperature packaged SiC JFETs.

Development of a 250°C 15kV SuperCascode Switch Using SiC JFET Technology

This paper investigates the failure modes of SiC MOSFETs-based passive voltage clamping dc solid-state circuit breakers (SSCBs). There are two major concerns of main SiC switch failure that are analyzed in this paper: 1) gate-source voltage ringing related switch degradation/failure when cutting off heavy fault current with high di/dt. 2) thermal runaway directly caused by the short circuit surge current in the main switch before the cut-off and transient power strike during cutoff. Two 10A/86A dc interruption experiments are conducted to demonstrate the failure caused by gate ringing due to the high di/dt issue coupled with unavoidable parasitic common source impedance of the device package. The thermal runaway failure due to the short circuit current surge and transient turn-off power strike is also demonstrated by a 631A dc interruption test. At last, an active commutation current injection scheme is discussed as future research trends to address the revealed gate ringing and cut-off power strike issues in SSCBs.

Short Circuit Fault Induced Failure of SiC MOSFETs in DC Solid-State Circuit Breakers

Insulated metal substrate (IMS) boards have been widely used in industry for their remarkable electrical and thermal performance. However, the IMS boards require a separate driver board that affects the power density. With Gallium Nitride enhancement-mode high electron mobility transistors (GaN E-HEMTs) being adopted in modern power converters, power density is becoming critical more than ever. This paper proposes the next generation of single-board IMS power stages (i.e., IMS4). In this board, the power board and the driver board are embedded into a single board. Furthermore, a CerStrate™ ceramic substrate single-board solution is proposed that maintains the exact electrical specifications as observed in IMS4 and significantly enhances the thermal performance. The superiority of these single-board solutions is verified through finite element analysis (FEA) simulations and experiments.

Next Generation of GaN Single-Board High Power Stages

In this work, Infineon’s 100V 3mΩ CoolGaN™ is evaluated and compared with a 100V similar Rdson MOSFET using OptiMOS™5 silicon technology in a three-phase inverter for battery powered motor drive applications. In order to minimize conduction losses, 30ns dead time is achieved for GaN due to its lower gate and output charge in comparison to 60ns of dead time for silicon. A motor-generator setup is developed to evaluate a 48V drone motor up to ~1kW of inverter power. For a motor speed of 4000RPM, with a bus voltage of 48V and 100 kHz switching frequency, GaN shows higher efficiency across the entire load range. At 1/3rd load (~300W), 98.67% and at full load (~900W) 98.10% power efficiency values are achieved. At light load (~45W), a significant increase of ~5% is also observed in efficiency. This experimentally demonstrates that 100V CoolGaN™ is ideal for developing high frequency switching inverters with high power densities and motor efficiencies in the kilowatt power range.

100V GaN for Highly Efficient 1kW Motor Drive Applications

This paper presents a compact three-level (3L) Gallium Nitride (GaN) power module with low parasitic parameters. The power loop, gate loop and PCB layout are designed and optimized carefully to achieve: 1) low parasitic parameters; 2) good thermal performance; 3) compact size and high integration; 4) easy utilization on building 3L ANPC converter. To achieve higher power rating, for two highfrequency (HF) switch legs, three GaN Systems’ GS665016T are paralleled and for the low-frequency pair, two switches are paralleled considering the much lower switching loss. The decoupling capacitors, driver circuits and auxiliary power supplies are all integrated into the module for the easy utilization and small parasitics. Double-pulse test (DPT) is applied to test the electrical characteristics and a bidirectional three-phase 3L ANPC converter is built using the proposed modules to verify the electrical performance and thermal performance.

Compact Three-Level GaN Power Module Suitable for Active-Neutral-Point-Clamped (ANPC) Three-Level Converter

The past decade has seen noticeable advancements in the miniaturization of wide-band gap semiconductor technology making it feasible to be applied in demanding applications such as more-electric-aircrafts (MEA). Multiple high speed electric motors operating in parallel with current ratings in hundreds of amps are required to match the power delivery capability of conventional jet engines. As a result, the power electronics driving the motors require special attention to parallel multiple active switches in order to meet the high current requirements. This paper presents the design of an axially stator mounted 250 kW integrated modular motor drive for MEA applications. The design considerations presented include optimal component placement and layer stackup to minimize voltage overshoots during switch commutation, optimal gate drive layout to synchronize the current sharing of multiple GaN active switches, and the selection process of the on-board current sensor. Lastly, experimental test results are presented that verify the efficacy of the proposed design.

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Comparison of Thermally Optimized SMD Packages for 100 V GaN HEMTs in 300 kHz Buck Converter High Current Applications

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