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PAPER DOI: 10.1109/IRPS48228.2024.10529475
technical paper
A Novel Induced Offset Voltage Sensor for Separable Wear-Out Mechanism Characterization in a 12nm FinFET Process
keywords:
semiconductor device breakdown
analog circuits
accelerated aging
integrated circuit reliability
sensors
On-chip sensors are a key tool in characterizing wear-out processes in semiconductors. We present a novel sensor design that can separably monitor transistor wear-out under BTI and HCI stress regimes in both NMOS and PMOS transistors and that allows for DC read-out. The design is implemented in a 12nm FinFET process and subjected to 1500 hours of stress to verify the sensor and provide insights into scaled CMOS degradation behaviours.
