United States

The purpose of this paper is to investigate the impact of the SiC device packages on the commutation performance characteristics of current-source inverters (CSIs). The parasitic components in the CSI current commutation loop between the two-phase legs and output capacitors have a significant impact on the high-frequency performance of the SiC devices. To meet the elevated current requirements of high-power CSIs, it is often necessary to connect multiple discrete devices in parallel which increases the current commutation loop length. The selection of compact high-power SiC MOSFET and Schottky diode modules instead of discrete devices can be highly desirable to reduce the loop inductance and improve the system performance and power density. Two CSI benchtop prototype units, one with SiC discrete devices and the other with power modules, have been designed and tested, and the performances of the two CSIs are compared. The CSI with SiC power modules significantly reduces the inverter volume and lowers the parasitic inductance by 60% and the voltage ripple amplitude by 20% compared to the CSI unit with discrete devices.

IEEE WiPDA 2022

Comparative Investigation of Current-Source Inverters Using SiC Discrete Devices and Power Modules

sic power modules

sic discrete devices

parasitic inductance

current source inverter

current commutation

wide bandgap

**[DOWNLOAD THE DRC 2021 DIGEST](https://drive.google.com/file/d/17_-pkYf4IBbVuNYgohTf0iZJORVGp_uN/view?usp=sharing)**

**[DOWNLOAD A COPY OF THE FINAL DRC PROGRAM](https://drive.google.com/file/d/1Ek8UIDCowpLq0z2hXav5tn67FboxS03N/view?usp=sharing)**

For almost eight decades, the Device Research Conference (DRC) has brought together leading scientists, researchers and students to share their latest discoveries in device science, technology and modeling. Notably, many of the first public disclosures of key device technologies were made at the DRC. This year marks the 79th anniversary of the DRC—the longest running device research meeting in the world. As we commemorate this meeting, the high-caliber technical sessions will be highlighted by plenary talks and invited talks by international research pioneers and leaders behind modern electronic technology.

Given the ongoing global health concerns associated with COVID-19 (Coronavirus), the DRC leadership has decided to hold the 2021 Device Research Conference in a virtual (online) format. This follows an enormously successful 2020 DRC held virtually, in which we had record attendance and worldwide participation of more than 875 attendees from 33 countries.

The 2021 Conference will feature:

* Informative, timely short courses in rapidly developing fields
* Oral and poster presentations on electronic/photonic device experiments and simulations
* Plenary and invited presentations given by worldwide leaders
* Evening “rump” session
* Strong student participation and Student Paper Awards

DRC is held in coordination with the Electronic Materials Conference (EMC), which will occur the same week, from June 23-25. As has happened in person in past years, in 2021, the virtual DRC and EMC sessions on the shared day, Wednesday, June 23, will be open to all attendees from both conferences. This recognizes the strong interaction between device and electronic materials research and provides fruitful exchanges of information between attendees of both Conferences. For information on the 63rd Electronic Materials Conference, please visit the [EMC 2021 website.](https://www.mrs.org/63rd-emc/)

2021 DRC individual presentation videos will become available in Underline at the end of each technical session. A recording of each full live session with Q&A will be posted later during the conference. To facilitate re-viewing of recorded talks and sessions, the DRC Underline site will remain open through 11:59pm (US EDT) on July 7th. DRC Conference registration will remain open at www.mrs.org/drc-2021/registration through June 30th.

Thank you for joining us at the 2021 Device Research Conference!

**General Chair**
 Zhihong Chen, Purdue University

**Technical Program Chair**
 Becky (R.L.) Peterson, University of Michigan

**Technical Program Vice-Chair**
 Gregg Jessen, BAE Systems

You can register for the 79th Device Research Conference with the following link. https://www.mrs.org/drc-2021

DRC 2021

For almost eight decades, the Device Research Conference (DRC) has brought together leading scientists, researchers and students to share their latest discoveries in device science, technology and modeling. Notably, many of the first public disclosures of key device technologies were made at the DRC. This year marks the 79th anniversary of the DRC—the longest running device research meeting in the world. As we commemorate this meeting, the high-caliber technical sessions will be highlighted by plenary talks and invited talks by international research pioneers and leaders behind modern electronic technology.

technical paper

Download the proceedings [here](https://underline.io/events/372/lounge)
 
 
 The IEEE Workshop on Wide Bandgap Power Devices & Applications (WiPDA) provides a forum for device scientists, circuit designers, & application engineers from the Power Electronics & Electron Devices Societies to share technology updates, research findings, experience & potential applications.
 
 **Topics of interest**
* Heteroepitaxial & Bulk Materials Growth
* Gate Dielectrics & Surface Passivation
* Device Structures & Fabrication Techniques
* Device Characterization & Modeling
* Very-High Efficiency Or Compact Converters
* Safe Operating Areas Of Wide Bandgap Devices, including Short Circuit, Spike, &Transient Tolerance
* Harsh Environment (High Temperature) Operation & Reliability
* Packaging Power Modules & ICs
* Gate Drive & Other Auxiliary Circuits
* High-Performance Passive Components
* Hard-Switched & Soft-Switched Application Analysis
* Applications in Renewable Energy & Energy Storage, Transportation, Industrial Drives, Grid Power Systems, Space and Aerospace
* Wide Bandgap System Design Philosophies & Strategies
* Radio Frequency (RF) GaN
* Technology Roadmap of Wide Bandgap Including Devices, Applications and Packaging

You must register to attend this event. If you haven't done so already, please use the link below to register for the event. All registered attendees will have access to the event site on November 4th.

Registration Is Required

The IEEE Workshop on Wide Bandgap Power Devices & Applications (WiPDA) provides a forum for device scientists, circuit designers, & application engineers from the Power Electronics & Electron Devices Societies to share technology updates, research findings, experience & potential applications.

Packaging and integration of wide bandgap power semiconductors

Managing EMI of SiC power electronics

Medium-voltage (MV) dual-active-bridge (DAB) converters have become an emerging technology thanks to highvoltage silicon carbide (SiC) devices and nanocrystalline magnetic materials. However, the need of phase-shift inductance and insulation requirements for the MV DAB may complicate the design of the transformer and the MV DAB converter, which can also induce higher loss and occupy more space. In this paper, the leakage integration and insulation techniques are discussed for a 6.7-kV/850-V DAB converter, meeting both the inductance and insulation requirements of the MV DAB converter. Ferrite cores with air gaps are inserted between the LV and MV windings without introducing high loss, and the MV winding is selectively shielded to avoid high parasitics and meet the insulation requirement. Test results have verified the effectiveness of this design.

A Medium-Voltage Transformer with Integrated Leakage Inductance for 10 kV SiC-Based Dual-Active-Bridge Converter

Tetra Corporation is developing a pulsed power drilling system for the geothermal industry. The system requires a high temperature switching technology to replace the existing technology based on Si thyristors with a temperature limit of 150°C. This work focuses on the development of such switch based on a Supercascode configuration using SiC JFET technology. The development presented contains thermal models, packaging design and processes, circuit simulations and prototypes of both the Supercascode switch and the high temperature packaged SiC JFETs.

Development of a 250°C 15kV SuperCascode Switch Using SiC JFET Technology

This paper investigates the failure modes of SiC MOSFETs-based passive voltage clamping dc solid-state circuit breakers (SSCBs). There are two major concerns of main SiC switch failure that are analyzed in this paper: 1) gate-source voltage ringing related switch degradation/failure when cutting off heavy fault current with high di/dt. 2) thermal runaway directly caused by the short circuit surge current in the main switch before the cut-off and transient power strike during cutoff. Two 10A/86A dc interruption experiments are conducted to demonstrate the failure caused by gate ringing due to the high di/dt issue coupled with unavoidable parasitic common source impedance of the device package. The thermal runaway failure due to the short circuit current surge and transient turn-off power strike is also demonstrated by a 631A dc interruption test. At last, an active commutation current injection scheme is discussed as future research trends to address the revealed gate ringing and cut-off power strike issues in SSCBs.

Short Circuit Fault Induced Failure of SiC MOSFETs in DC Solid-State Circuit Breakers

Insulated metal substrate (IMS) boards have been widely used in industry for their remarkable electrical and thermal performance. However, the IMS boards require a separate driver board that affects the power density. With Gallium Nitride enhancement-mode high electron mobility transistors (GaN E-HEMTs) being adopted in modern power converters, power density is becoming critical more than ever. This paper proposes the next generation of single-board IMS power stages (i.e., IMS4). In this board, the power board and the driver board are embedded into a single board. Furthermore, a CerStrate™ ceramic substrate single-board solution is proposed that maintains the exact electrical specifications as observed in IMS4 and significantly enhances the thermal performance. The superiority of these single-board solutions is verified through finite element analysis (FEA) simulations and experiments.

Next Generation of GaN Single-Board High Power Stages

In this work, Infineon’s 100V 3mΩ CoolGaN™ is evaluated and compared with a 100V similar Rdson MOSFET using OptiMOS™5 silicon technology in a three-phase inverter for battery powered motor drive applications. In order to minimize conduction losses, 30ns dead time is achieved for GaN due to its lower gate and output charge in comparison to 60ns of dead time for silicon. A motor-generator setup is developed to evaluate a 48V drone motor up to ~1kW of inverter power. For a motor speed of 4000RPM, with a bus voltage of 48V and 100 kHz switching frequency, GaN shows higher efficiency across the entire load range. At 1/3rd load (~300W), 98.67% and at full load (~900W) 98.10% power efficiency values are achieved. At light load (~45W), a significant increase of ~5% is also observed in efficiency. This experimentally demonstrates that 100V CoolGaN™ is ideal for developing high frequency switching inverters with high power densities and motor efficiencies in the kilowatt power range.

100V GaN for Highly Efficient 1kW Motor Drive Applications

This paper presents a compact three-level (3L) Gallium Nitride (GaN) power module with low parasitic parameters. The power loop, gate loop and PCB layout are designed and optimized carefully to achieve: 1) low parasitic parameters; 2) good thermal performance; 3) compact size and high integration; 4) easy utilization on building 3L ANPC converter. To achieve higher power rating, for two highfrequency (HF) switch legs, three GaN Systems’ GS665016T are paralleled and for the low-frequency pair, two switches are paralleled considering the much lower switching loss. The decoupling capacitors, driver circuits and auxiliary power supplies are all integrated into the module for the easy utilization and small parasitics. Double-pulse test (DPT) is applied to test the electrical characteristics and a bidirectional three-phase 3L ANPC converter is built using the proposed modules to verify the electrical performance and thermal performance.

Compact Three-Level GaN Power Module Suitable for Active-Neutral-Point-Clamped (ANPC) Three-Level Converter

The past decade has seen noticeable advancements in the miniaturization of wide-band gap semiconductor technology making it feasible to be applied in demanding applications such as more-electric-aircrafts (MEA). Multiple high speed electric motors operating in parallel with current ratings in hundreds of amps are required to match the power delivery capability of conventional jet engines. As a result, the power electronics driving the motors require special attention to parallel multiple active switches in order to meet the high current requirements. This paper presents the design of an axially stator mounted 250 kW integrated modular motor drive for MEA applications. The design considerations presented include optimal component placement and layer stackup to minimize voltage overshoots during switch commutation, optimal gate drive layout to synchronize the current sharing of multiple GaN active switches, and the selection process of the on-board current sensor. Lastly, experimental test results are presented that verify the efficacy of the proposed design.

Design of High Current, High Power Density GaN Based Motor Drive for All Electric Aircraft Application

This paper provides an optimization process of a 100-W three-level flying capacitor totem-pole PFC in USB TypeC Power Delivery (PD) for aircraft applications. The switching frequency and PFC inductor current ripple are varied to set the PFC inductance variation range and design the differential mode (DM) and common mode (CM) filter to meet the EMI requirement in the DO-160 standard. The design process for all the magnetic components is described with results at different switching frequencies and current ripples. The total volume and loss for all cases with both single-stage and two-stage filters are plotted and compared. Pareto fronts for the two cases are drawn to show the optimal design parameters for the application.

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Comparative Investigation of Current-Source Inverters Using SiC Discrete Devices and Power Modules

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Packaging and integration of wide bandgap power semiconductors

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