United States

As the world looks beyond silicon for the next generation of power electronics, NexGen Vertical GaN™, the world’s first GaN-on-GaN power semiconductor, unlocks the full potential of Gallium Nitride (GaN). It is the only wide band gap power semiconductor that provides high-voltage capabilities up to 4kV, switching frequencies up to 10MHz, and avalanche and short-circuit robustness. This makes it an ideal power semiconductor for applications from LED Lighting and Computing to Data Centers and Electric Vehicles. NexGen is reinventing power electronics by leveraging this breakthrough technology and building a scalable, software-configurable power platform that enables the smallest, lightest, and most efficient power systems.

IEEE WiPDA 2022

Vertical GaN “Technology of Future” – Now a Reality with NexGen Power Systems

**[DOWNLOAD THE DRC 2021 DIGEST](https://drive.google.com/file/d/17_-pkYf4IBbVuNYgohTf0iZJORVGp_uN/view?usp=sharing)**

**[DOWNLOAD A COPY OF THE FINAL DRC PROGRAM](https://drive.google.com/file/d/1Ek8UIDCowpLq0z2hXav5tn67FboxS03N/view?usp=sharing)**

For almost eight decades, the Device Research Conference (DRC) has brought together leading scientists, researchers and students to share their latest discoveries in device science, technology and modeling. Notably, many of the first public disclosures of key device technologies were made at the DRC. This year marks the 79th anniversary of the DRC—the longest running device research meeting in the world. As we commemorate this meeting, the high-caliber technical sessions will be highlighted by plenary talks and invited talks by international research pioneers and leaders behind modern electronic technology.

Given the ongoing global health concerns associated with COVID-19 (Coronavirus), the DRC leadership has decided to hold the 2021 Device Research Conference in a virtual (online) format. This follows an enormously successful 2020 DRC held virtually, in which we had record attendance and worldwide participation of more than 875 attendees from 33 countries.

The 2021 Conference will feature:

* Informative, timely short courses in rapidly developing fields
* Oral and poster presentations on electronic/photonic device experiments and simulations
* Plenary and invited presentations given by worldwide leaders
* Evening “rump” session
* Strong student participation and Student Paper Awards

DRC is held in coordination with the Electronic Materials Conference (EMC), which will occur the same week, from June 23-25. As has happened in person in past years, in 2021, the virtual DRC and EMC sessions on the shared day, Wednesday, June 23, will be open to all attendees from both conferences. This recognizes the strong interaction between device and electronic materials research and provides fruitful exchanges of information between attendees of both Conferences. For information on the 63rd Electronic Materials Conference, please visit the [EMC 2021 website.](https://www.mrs.org/63rd-emc/)

2021 DRC individual presentation videos will become available in Underline at the end of each technical session. A recording of each full live session with Q&A will be posted later during the conference. To facilitate re-viewing of recorded talks and sessions, the DRC Underline site will remain open through 11:59pm (US EDT) on July 7th. DRC Conference registration will remain open at www.mrs.org/drc-2021/registration through June 30th.

Thank you for joining us at the 2021 Device Research Conference!

**General Chair**
 Zhihong Chen, Purdue University

**Technical Program Chair**
 Becky (R.L.) Peterson, University of Michigan

**Technical Program Vice-Chair**
 Gregg Jessen, BAE Systems

You can register for the 79th Device Research Conference with the following link. https://www.mrs.org/drc-2021

DRC 2021

For almost eight decades, the Device Research Conference (DRC) has brought together leading scientists, researchers and students to share their latest discoveries in device science, technology and modeling. Notably, many of the first public disclosures of key device technologies were made at the DRC. This year marks the 79th anniversary of the DRC—the longest running device research meeting in the world. As we commemorate this meeting, the high-caliber technical sessions will be highlighted by plenary talks and invited talks by international research pioneers and leaders behind modern electronic technology.

keynote

Download the proceedings [here](https://underline.io/events/372/lounge)
 
 
 The IEEE Workshop on Wide Bandgap Power Devices & Applications (WiPDA) provides a forum for device scientists, circuit designers, & application engineers from the Power Electronics & Electron Devices Societies to share technology updates, research findings, experience & potential applications.
 
 **Topics of interest**
* Heteroepitaxial & Bulk Materials Growth
* Gate Dielectrics & Surface Passivation
* Device Structures & Fabrication Techniques
* Device Characterization & Modeling
* Very-High Efficiency Or Compact Converters
* Safe Operating Areas Of Wide Bandgap Devices, including Short Circuit, Spike, &Transient Tolerance
* Harsh Environment (High Temperature) Operation & Reliability
* Packaging Power Modules & ICs
* Gate Drive & Other Auxiliary Circuits
* High-Performance Passive Components
* Hard-Switched & Soft-Switched Application Analysis
* Applications in Renewable Energy & Energy Storage, Transportation, Industrial Drives, Grid Power Systems, Space and Aerospace
* Wide Bandgap System Design Philosophies & Strategies
* Radio Frequency (RF) GaN
* Technology Roadmap of Wide Bandgap Including Devices, Applications and Packaging

You must register to attend this event. If you haven't done so already, please use the link below to register for the event. All registered attendees will have access to the event site on November 4th.

Registration Is Required

The IEEE Workshop on Wide Bandgap Power Devices & Applications (WiPDA) provides a forum for device scientists, circuit designers, & application engineers from the Power Electronics & Electron Devices Societies to share technology updates, research findings, experience & potential applications.

Ultra-wide-bandgap (UWBG) AlGaN alloys (Eg > 4 eV) are appealing for the next-generation of high-voltage power devices due to their superior material properties. Most notable is that the critical electrical field scales as the bandgap to the ~ 2.0-2.5 power. Thus, power diodes employing Al-rich AlGaN alloys (4.0 < Eg < 6.2 eV) are expected to operate at higher breakdown voltages with thinner and more heavily-doped drift regions, leading to lower resistive losses and higher power density compared to Si-, SiC- and even GaN-based devices. Additionally, the formation of AlGaN-based heterojunctions and the utilization of polarization fields for doping offer device design options not currently possible for devices based on SiC and other ultra-wide bandgap semiconductors such as diamond and b-Ga2O3. We will present polarization doping of both p- and n-type AlGaN alloys in compositions where conventional impurity doping fails and employ polarization doping to fabricate Al0.7Ga0.3N PN diodes with kilovolt breakdown voltages. In addition to appealing material properties such has high critical electric field, we have found that the electrical characteristics of Schottky diodes and regrown PN junctions in AlGaN alloys show a surprising robustness to residual, sub-surface etch damage that degrades the performance and thus complicates the fabrication of GaN devices. This robustness to etch damage has led to the demonstration of PN diodes where the p-anode was formed by regrowth in an etched well which resulted in diodes that exhibit reverse breakdown voltages of 1.8 kV and are indistinguishable from continuously grown PN diodes. A major challenge to realizing vertically conducting AlGaN power devices is the lack of a native, conducting substrate. To address the need for vertically conducting device architectures, we present an AlGaN overgrowth process on previously-patterned, conducting GaN substrates that have been used to fabricate PN diodes with 7 mm thick drift layers in Al0.3Ga0.7N that reach breakdown voltages of 1 kV. These and other examples to be presented illustrate the potential of AlGaN alloys for realizing kilovolt-class power diodes and transistors for next generation power systems.

Ultra-Wide Bandgap AlGaN Alloys for Power Electronics

Supply and Cost of Substrates for Compound Semiconductors

A new Dodecagonal (polygon with twelve sides, short for Dod) cell topology is designed for 4H-SiC planar power MOSFETs. The Dod cell is used in the layout design of the 650 V SiC MOSFETs. The nominal Hexagonal (Hex) cell and a recently published Octagonal (Oct) cell are also used on the 650 V SiC MOSFET layout designs for comparisons. The devices are fabricated, diced, and packaged for static and dynamic characterizations. Experimental results show that the Hex-cell MOSFET has the lowest specific ON-resistance (Ron,sp) and is suitable for high-power applications. The Dod and Oct-cell MOSFETs have much smaller gate-drain capacitance than Hexcell MOSFETs, making them good candidates for high-frequency applications. The new Dod cell is designed with optimized channel density to have reduced Ron,sp compared to the Oct cell.

A New Cell Topology for 4H-SiC Planar Power MOSFETs and Comparison with Hexagonal and Octagonal Cell Topologies

Several different designs of 1.2kV-rated 4HSiC JBS diode integrated MOSFETs (JBSFETs) have been successfully fabricated to increase the 3rd quadrant device performance while maintaining the electrical characteristics on both the forward and blocking modes of operation when compared to its MOSFET counterpart. Incorporating the Schottky area in an efficient manner to improve overall device performance has been a critical path in the development and adoption of 4H-SiC JBSFETs rather than MOSFETs copackaged with JBS Diodes. Device design, fabrication, and electrical performances are discussed in this paper and as a result, an optimum JBSFET design is proposed.

Exploring Optimum Designs for 1.2kV 4HSiC JBS Diode Integrated MOSFETs (JBSFETs)

In this paper, we explore the optimization of “saddle” type finger layout for lateral SiC RESURF (Reduced Surface Electric Field) diodes where concave/convex finger ends combined with mesa etch isolation achieve over 82% of the inner cell breakdown voltage. Furthermore, added deep P+ JBS pattern near the anode Schottky contact significantly improves robustness against field crowding when cell pitch/finger width is reduced to densify the chip. Improved surge current capability compared with pure Schottky structure is investigated through mix-mode TCAD simulation. The proposed design methodologies offer guidance for future efforts toward realizing a monolithic SiC high voltage integrated circuit.

Design Optimization and Surge Current Capability of 4H-SiC Lateral Deep P+ JBS Diode on Thin RESURF Layer

It is well known that the high density of interface traps (Dit) near the conduction band (CB) edge limits the net inversion layer charge in the conduction band of a 4H-SiC/SiO2 MOSFET in strong inversion. Measurements at cryogenic temperatures are necessary to study the presence of interface trap density (Dit) up to the CB edge. In our study, we extracted the threshold voltage (VT) from cryogenic (10 K) to high temperature (500 K) and calculated the VT shift which is a measure of interface trapped negative charge (∆Qit). This shift in negative charge is used to estimate a relative magnitude of Dit near the CB edge. The higher the value of ∆VT, the higher the Dit for a given sample.

Characterization of Near Conduction Band SiC/SiO2 Interface Traps in Commercial 4H-SiC Power MOSFETs

In order to evaluate the time evolution of avalanche breakdown in wide and ultra-wide bandgap devices, we have developed a cable pulser experimental setup that can evaluate the time-evolution of the terminating impedance for a semiconductor device with a time resolution of 130 ps. We have utilized this pulser setup to evaluate the time-to-breakdown of vertical Gallium Nitride and Silicon Carbide diodes for possible use as protection elements in the electrical grid against fast transient voltage pulses (such as those induced by an electromagnetic pulse event). We have found that the Gallium Nitride device demonstrated faster dynamics compared to the Silicon Carbide device, achieving 90% conduction within 1.37 ns compared to the SiC device response time of 2.98 ns. While the Gallium Nitride device did not demonstrate significant dependence of breakdown time with applied voltage, the Silicon Carbide device breakdown time was strongly dependent on applied voltage, ranging from a value of 2.97 ns at 1.33 kV to 0.78 ns at 2.6 kV. The fast response time (< 5 ns) of both the Gallium Nitride and Silicon Carbide devices indicate that both materials systems could meet the stringent response time requirements and may be appropriate for implementation as protection elements against electromagnetic pulse transients.

Reverse Breakdown Time of Wide Bandgap Diodes

We investigate the drift of threshold voltage (VTH) and on-resistance (RON) in p-GaN power HEMTs after being submitted to negative/positive gate stress. Negative (Positive) Gate Stress (NGS/PGS) was applied at a gate-to-source bias of |VNGS| = VPGS = 6 V up to a cumulative stress time of 8×103 s at room temperature. We found that during NGS both VTH and RON increased over stress time, whereas during PGS both parameters decreased and stabilized to the values prior to stress application. This symmetric behavior was maintained after 5 full NGS/PGS stress cycles, indicating the absence of permanent degradation. To further characterize the VTH and RON transients, the NGS/PGS stress cycles were repeated at different temperatures (T=30-105 °C). While VTH exhibited a strong Tdependence (EA ≈ 0.6 eV) during NGS, a negligible variation of the VTH transients with T was found during PGS (EA ≈ 0 eV). Instead, RON transients exhibited approximately the same Tdependence during both NGS and PGS (EA ≈ 0.3-0.4 eV).

Symmetrical VTH/RON Drifts Due to Negative/Positive Gate Stress in p-GaN Power HEMTs

Reliability tests are a decisive step for GaN technology qualification. To evaluate the Mean Time to Failure (MTTF), it is necessary to know well the peak channel temperature (Tpeak) reached at the hottest point of the device. For an AlGaN/GaN High Electron Mobility Transistor (HEMT), this region lies at AlGaN/GaN interface where the two-dimensional electron gas (2DEG) is located near the gate contact. InfraRed (IR) Thermography was performed on our GaN on Si HEMT devices to measure Tpeak. Considering the correction in underestimation of Tpeak temperature, the MTTF was extracted. We also performed Raman measurements and Tpeak was evaluated with the aid of 3-Dimensional thermal simulations. The Tpeak difference between IR and Raman technique is more than 100°C and far from the evaluation of about 40-50°C often found in literature. The reliability measurements show a high robustness and from the Raman approach MTTF is approximately 109 hours instead of the 106 hours estimated with the IR method at Tpeak =200°C.

Peak Channel Temperature Determination for an AlGaN/GaN HEMT with Raman Thermography and MTTF Extraction for Long Term Reliability

This paper reports on the high temperature (HT) robustness of enhancement-mode (E-mode) p-GaN-gated AlGaN/GaN high electron mobility transistors (HEMTs), with an emphasis on the key transistor-level parameters for digital and analog mixed-signal applications. In-situ measurements from room temperature (RT) to 500 °C show that trends in Vth, RON, ID,max and IG,max are largely as expected based on firstorder changes in the semiconductor properties. The fabricated transistors exhibited stable performance over 20 days at 500 °C. To the best of the authors’ knowledge, this work is the first systematic study on the HT performance of E-mode p-GaN-gated AlGaN/GaN HEMTs, and sheds light on their use in mixed-signal and low-voltage power circuits.

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