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In this work, a detailed analysis of degradation and failure of semi-vertical GaN-on-Si trench MOSFETs is reported. Off-state, semi-on state and on-state conditions were analyzed, to evaluate how the gate and drain bias can impact on the failure voltage. We demonstrate that: a) devices with a bilayer gate insulator (2.5 nm Al2O3 interface dielectric to GaN, + 35 nm SiO2 main dielectric) have a superior performance, compared to single-insulator (35 nm Al2O3) samples; b) in a drain step-stress, the gate voltage (resulting in different operating regimes, off, semi-on or on-state) can significantly impact on the failure voltage of the devices; c) stress at high VGS and/or VDS may induce a significant shift in threshold voltage, which is stronger when the devices are stressed in the on-state. The results – complemented by 2D simulations – provide a description of the factors limiting the breakdown robustness of GaN vertical transistors.

IRPS 2022

Influence of Drain and Gate Potential on Gate Failure in Semi-Vertical GaN-on-Si Trench MOSFET

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IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability. It is also an outstanding chance to meet and network with reliability colleagues from around the world.

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Hot electron trapping can significantly impact the performance of GaN-based HEMTs. Within this paper, the effect of current density and electric field on the severity of hot-electron degradation is presented. The experiments demonstrate that: (i) we can isolate the hot electron trapping processes, (ii) the hot-electron induced performance degradation follows a logarithmic kinetic, which can be modeled by rate equations, and (iii) the amount of current collapse has a linear dependence on the applied electric field and a logarithmic dependence on the current density, in agreement with theoretical equations.

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Influence of Drain and Gate Potential on Gate Failure in Semi-Vertical GaN-on-Si Trench MOSFET

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