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IEEE ISSCC Innovation
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February 13, 2021
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United States
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Presentation digest / paper:
https://submissions.mirasmart.com/verify/ISSCC2021/Underline/Innovations/Digest/D09_06.pdf
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Abstract:
In Paper 9.6, Sony Semiconductor Solutions describes a 62mm2 stacked-chip solution, combining a back-illuminated (BI) pixel CMOS image sensor at 4056×3040 resolution and 1.55mm pixel-pitch, together with 4.97TOPS/W of 22nm digital signal processing of 8b, 16b, or 32b integers in two different DSP cores, multiple tensor direct memory access (TDMA) engines and a scheduler optimized for convolutional neural network (CNN) processing. Capable of 120fps with parallel image readout and CNN inference, their system can offer AI processing capability at reduced size, power and cost, while addressing privacy concerns.