Chalcogenide-based self-rectifying selector-only memory (SOM) concept has shown great potential for high-density high-performance applications. While very promising, the understanding of the physical mechanism behind the polarity effect is still lacking. This work provides an in-depth investigation of SiGeAsSe OTS-only memory and discusses its possible limitations to establish the underlying performance and reliability trade-offs. Additionally, we propose an updated electronic switching model, capable of qualitatively reproducing the polarity effect as well as observed reliability results.

Comprehensive Performance and Reliability Assessment of Se-based Selector-Only Memory

We study oxygen flow role during IGZO PVD process on high temperature PBTI in back-gated TFTs by combining light-assisted with electrical stress measurements. Oxygen flow is observed to affect the magnitude of charge trapping and hydrogen related channel doping during PBTI. We show a correlation between sub-gap DOS and oxygen flow during deposition: the larger the oxygen flow, the smaller the light response at time-zero and its increase during PBTI, despite a larger negative DVth. 

Light-assisted investigation of the role of oxygen flow during IGZO deposition on deep subgap states and their evolution under PBTI

NBTI of IGZO TFTs is studied using diverse devices and conditions. Four main characteristics are observed: V th shift is almost independent of V g_stress, and shows a large activation energy and a steep time kinetic, while the relaxation rate decreases with increasing temperatures. Using TCAD and modelling, these peculiar features can be explained by an oxide-field-dominated hydrogen release at gate side of the gate-dielectric, inducing additional doping and the negative V th shift.

Fundamental understanding of NBTI degradation mechanism in IGZO channel devices

**Please read the paper on the following link:**

https://ieeexplore.ieee.org/document/9212585

**Abstract:**

We propose, for the first time, an indium gallium zinc oxide (IGZO)-based 2T1C compute cell (IGZO-cell) for analog in-memory computing. To assess the impact of an IGZO-cell-based array including the periphery on power and accuracy, a PyTorch framework was developed to analytically modeled analog components. The results are reported for a ResNet20 network on the Canadian Institute For Advanced Research-10 (CIFAR-10) benchmark. The state-of-the-art energy efficiency of 15 peta operations per second (POPS)/W including the periphery is achieved by using our proposed IGZO-cell with CMOS compatibility. Finally, it is shown that, with a properly trained neural network model, there is no degradation of test accuracy with 10% device to device variability for the IGZO devices.

IGZO-Based Compute Cell for Analog In- Memory Computing—DTCO Analysis to Enable Ultralow-Power Ai at Edge

**Please read the paper on the following link:**

https://1worldcontent.com/ess/9269.pdf

**Abstract:**

We present a 2T0C IGZO based Capacitor-less memory that enhances the sensing margin and retention time for DRAM applications requiring higher data immunity. In the proposed technique for increased data integrity, the Read Bit-Line (RBL) is precharged at Half-VDD, instead of Full-VDD, to utilize the rising edge of read word line (RWL) at the beginning of read. This increases the storage node potential of the bit-cell (due to coupling between RWL and the storage node) which is otherwise degraded at write termination due to coupling of write word line (WWL) and the storage node.

Enhanced Data Integrity of In-Ga-Zn-Oxide Based Capacitor-Less 2T Memory for DRAM Applications

To enable high-density cross-point arrays of magnetic memory a suitable access device is necessary. A promising candidate for this role is a metal-semiconductor-metal (MSM) tunneling device. In this work, the operation of an ultrathin Pt\6nm a-IGZO\Pt stack as an MSM selector is discussed. The focus is given to understanding the breakdown mechanism at high current regime, which prevents it from reaching the target current density. The breakdown is preceded by a gradual degradation process, which is manifested as an increase in high-field current after prolonged stress. This effect is recoverable – current returns to original value after sufficient delay time. Based on these observations, we propose a mechanism, where increased high-field current can be explained as a decrease in Schottky barrier height arising from stress-induced increase in oxygen vacancies.

Degradation mechanism of amorphous IGZO-based bipolar metal-semiconductor-metal selectors

In SOT-MRAM, the writing path is decoupled from the reading path and therefore considered robust against MgO breakdown in the MTJ. At operation, high current densities flow through the thin metallic SOT layer underneath the MTJ. We find that the SOT track is robust against electromigration, but we observe failure of the MTJ. A thorough chemical analysis indicates the activation of diffusion mechanisms that degrade the free layer and MgO tunnel barrier.

MTJ degradation in SOT-MRAM by self-heating-induced diffusion

7A (Emerging Memory Cont'd)

technical paper

#### Welcome to the 62nd IEEE International Reliability Physics Symposium (IRPS)! 
**The 2024 IEEE International Reliability Physics Symposium (IRPS) was held in Dallas, Texas from April 14 to 18, 2024.** 

[![](https://assets.underline.io/uploads/markdown_image/1/image/9cc005f94b4ba4a81918eb49e0a51057.png)](https://underline.io/events/446/reception)
[![](https://assets.underline.io/uploads/markdown_image/1/image/acae953ba70ae2a57eed7b0250d6dd7d.png)](https://www.irps.org/)
[![](https://assets.underline.io/uploads/markdown_image/1/image/e1806748f2fc69f825e596872a7afdfd.png)](https://drive.google.com/drive/folders/1SmhpLZD9swYxrfP0TYF6327QTIciy3tV?usp=drive_link)
 

**[IRPS 2024 eGuide](https://drive.google.com/file/d/1DHxkWbafodK_D2HlDi7lwRK7KatgBgBD/view?usp=drive_link)** 
Please save the zip file locally and click the "start.pdf" to view the file. 
 
**IRPS 2024 General Chair Welcome Message**

On behalf of the Management Committee of the IEEE International Reliability Physics Symposium (IRPS) and the IRPS Board of Directors, it gives me great pleasure to extend a warm welcome to all who are planning to attend the IRPS 2024, scheduled to take place from April 14-18, 2024, in Dallas, TX. 
Over its 62-year history, IRPS has solidified its position as the premiere conference for engineers and scientists to present new and original work in the field of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and other parts of the world, IRPS aims to deepen our understanding of reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS offers diverse opportunities for attendees to enhance their knowledge and understanding of all aspects of microelectronics reliability. It is also an outstanding chance to meet and network with reliability colleagues from around the world.

The IRPS 2024 technical activities will begin with two days of a total of twenty tutorial sessions covering a broad spectrum of emerging reliability topics beyond CMOS device, circuit and system reliability. These sessions are devoted to both newcomers as well as experts. Three reliability Year in Review (YIR) talks focusing on neuromorphic computing, dielectric breakdown in leading edge devices, and GaN technology will be provided on Monday after the tutorials.

The IRPS 2024 technical program will feature four distinguished keynote talks in the plenary sessions delivered by Prof. Shinichi Takagi from The University of Tokyo and Dr. Su Jin Ahn from Samsung on Tuesday, Dr. Rajeev Malik from IBM on Wednesday, and Dr. Sameer Pendharkar from Texas Instruments on Thursday. The technical program, organized into three parallel tracks, consists of contributed and seventeen invited papers from leaders in industry and academia. Additionally, two invited talks by recipients of paper awards from our sister conferences, European Symposium on Reliability of Electron Device Failure Physics and Analysis (ESREF) 2023 and the International Integrated Reliability Workshop (IIRW) 2023, will be given in the technical program. 

Tuesday evening will host ten workshops, offering an opportunity for in-depth, face-to-face discussions on emerging reliability challenges, including the three IRPS 2024 focus topics. A poster session will be held in the Austin Ranch outside the symposium building on Wednesday evening. Both events are sure to be lively. The IRPS 2024 and the International ESD Workshop (IEW) will be co-hosted with IEW registrants participating in both IRPS and IEW programs.

The IRPS 2024 will adopt a hybrid conference style, allowing virtual access to live oral presentations hosted by the Underline. Real-time streaming of all technical events (excluding Workshops and Posters) will be available in the US Central Timezone, providing virtual attendees with Q&A opportunities. For those virtual attendees who cannot watch the live presentations, the material will be available on demand to all attendees after the symposium. All authors will be presenting in person.

Finally, I would like to extend my extreme gratitude to our patrons, exhibitors, and all participants for their invaluable support, which makes IRPS successful. 

Please enjoy the IRPS 2024!

Koji Eriguchi, General Chair 
of 2024 IRPS Management Committee
 
**About IRPS** 
The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all parts of the world, IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability, and to meet and network with reliability colleagues from around the world.

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IRPS 2024 Main Conference

The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. 

5A (Process Integration)

4A (Transistors)

**Session Chairs:** Nitin Chawla, STMicroelectronics; Elisa Vianello, CEA-Leti

D3L-1: In/Near-Memory Computing (JOINT 2020 TEDbrief special edition & SSC-L special edition)

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.

Highlights:
* 3 joint keynote presentations
* 3 keynote presentations ESSCIRC
* 3 keynote presentations ESSDERC
* Invited papers with overall coverage of all aspects of advanced devices and circuits
* Presentation of IEEE and ESSCIRC/ESSDERC Awards
* Educational Events

JOINT PLENARY talks live broadcast: September 13, 2021 
ESSCIRC and ESSDERC KEYNOTE talks live broadcast: September 15, 2021 
LIVE Q&A INTERACTIVE sessions for all Conference Technical sessions: September 14 – 16 – 17, 2021 
LIVE Q&A INTERACTIVE sessions for all Educational Events: September 20-21-22, 2021 
(on demand videos available from September 6 until November 30, 2021)

**Please see here for the [ESSCIRC Guide](https://drive.google.com/file/d/10dghzuv4aQBty4QfTIY9Q8hXyqsue8Le/view?usp=sharing), [ESSDERC Guide](https://drive.google.com/file/d/10dx9y2tm9cHPDa4upNUYjfXCf44aPry5/view?usp=sharing), and the [Program at a Glance](https://drive.google.com/file/d/10eU0OLTXEpiNzI5hkqv4mSr43T8cedPP/view?usp=sharing)**

To access ESSCIRC ESSDERC 2021, you must pre-register for the conference.  Instructions on how to access the event will be provided directly to attendees and included on the ESSCIRC ESSDERC conference website. [Register now](https://www.esscirc-essderc2021.org/).

Please register for the ESSCIRC conference to join the event.

ESSCIRC ESSDERC 2021

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.





**Session Chairs:** Qing-Tai Zhao, Forschungszentrum Jülich; Tortorelli Innocenzo, Micron Technologies

E1L-5: Advanced Memory Devices

Poster Session: Emerging Memory

poster

#### Welcome to the 60th IEEE International Reliability Physics Symposium (IRPS)!

[![](https://assets.underline.io/uploads/markdown_image/1/image/f6b8cf9ecca2209dd3e0fcebe80a2915.png)](https://underline.io/events/282/reception)
[![](https://assets.underline.io/uploads/markdown_image/1/image/e787ff477f8d2b687fb0b54d83d35e11.png)](https://drive.google.com/drive/folders/1GAycr7pPrZG2ZzZP-geUL8vGWswjCB1N?usp=sharing)
[![](https://assets.underline.io/uploads/markdown_image/1/image/7492fafcc0c623afe96fe15207855ed9.png)](https://www.irps.org/)
 

**General Chair Welcome Message**

Welcome to IRPS 2022! When the IRPS Management Committee began making plans for Dallas, we recognized the strong desire by the reliability physics community to return to a face-to-face symposium that we last had in Monterey in 2019. But as time progressed, we recognized that travel restrictions were not being lifted as rapidly as we anticipated. Rather than leave out those of you who could not attend in person, we adopted a hybrid format allowing for both remote attendance and remote presentations. This is a first for IRPS and I am confident it will be a success for all.

With this new hybrid format, the symposium will return to the original five-day format with Tutorials and Year in Review on the first two days. The Technical Program, Keynote Talks, Workshops and Poster session will be held on the following three days. All of these (except Workshops and Posters) will be available via real-time streaming in the US Central Time zone with virtual attendees having Q&A access to the presenters. For those virtual attendees who cannot watch the live presentations, the material will be available on demand to all attendees for a month after the symposium with the ability to communicate with the authors.

In 2020, we were planning on co-hosting the International ESD Workshop (IEW) ESD workshop when the COVID-19 pandemic hit. For 2022, IEW will be seamlessly embedded into the IRPS Program and will sponsor three tutorials, an invited talk, two technical sessions and two evening workshops focused on ESD and latch-up. And we continue our
collaboration with our sister conference, European Symposium on Reliability of Electron Devices Failure Physics and Analysis (ESREF) by hosting their Best Paper and the International Integrated Reliability Workshop (IIRW) by hosting their Best Student Paper.

Our primary objective is to maintain the symposium’s leadership role in the reliability physics of microelectronic devices by attracting leading researchers to present their work and providing attendees the best place to access this information. With all the buzz in the media about whether Moore’s Law has hit its limit, IRPS has been promoting expertise developed in silicon-based reliability over the past sixty years and expanding into new material areas. This year, eight of the technical sessions are devoted to reliability in topics outside of traditional silicon, including wide bandgap GaN/SiC, emerging memory and neuromorphic computing. I hope our ability to draw these communities together will accelerate the cross-fertilization of ideas. 

The Technical Program consists of four keynote speakers, twenty-three invited speakers and eighty-seven oral presentations organized in thirty technical sessions on eighteen reliability topics. Over two evenings, there will be ten Workshops and sixty-six Poster presentations that are designed to allow in person attendees and experts to interact
with one another. With eighteen tutorials covering topics ranging from fundamental transistor and memory reliability all the way up to automotive and complex system-level reliability, this year’s symposium provides an excellent learning opportunity for engineers and scientists new to reliability as well as experienced individuals wanting to explore new
areas. The Year in Review, which serves as a summary of research in the past year, will cover 3D packaging, emerging memory and aging aware circuit designs.

Finally, I would like to express my extreme gratitude to our patrons and exhibitors, whose support makes IRPS possible.
And to all of you, our in person and virtual attendees, for supporting this symposium for sixty years!

**Charles W. Slayman, General Chair** 
**of 2022 IRPS Management Committee**
 
**About IRPS**

The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all parts of the world, IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability, and to meet and network with reliability colleagues from around the world.

IRPS 2022 Main Conference 

IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability. It is also an outstanding chance to meet and network with reliability colleagues from around the world.

Gouri Kar

7

48

Presentations

Comprehensive Performance and Reliability Assessment of Se-based Selector-Only Memory

Light-assisted investigation of the role of oxygen flow during IGZO deposition on deep subgap states and their evolution under PBTI

Fundamental understanding of NBTI degradation mechanism in IGZO channel devices

IGZO-Based Compute Cell for Analog In- Memory Computing—DTCO Analysis to Enable Ultralow-Power Ai at Edge

Enhanced Data Integrity of In-Ga-Zn-Oxide Based Capacitor-Less 2T Memory for DRAM Applications

Degradation mechanism of amorphous IGZO-based bipolar metal-semiconductor-metal selectors

MTJ degradation in SOT-MRAM by self-heating-induced diffusion

Stay up to date with the latest Underline news!

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