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Tetsuya Iizuka

University of Tokyo

harmonic distortion

systematic design

analog-to-digital converter

regenerative comparator

sample and hold

jitter

1

presentations

30

number of views

SHORT BIO

Tetsuya Iizuka received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Tokyo, Tokyo, Japan, in 2002, 2004, and 2007, respectively. From 2007 to 2009, he was with THine Electronics Inc., Tokyo, Japan, as a high-speed serial interface circuit engineer. He joined the University of Tokyo in 2009, where he is currently an Associate Professor with Systems Design Lab., School of Engineering. From 2013 to 2015, he was a Visiting Scholar with the University of California, Los Angeles, CA, USA. His current research interests include data conversion techniques, high-speed analog integrated circuits, digitally-assisted analog circuits, and VLSI computer-aided design.

Presentations

A Tutorial on Systematic Design of CMOS A/D Converters: Illustrated by a 10 b, 500 MS/s SAR ADC with 2 GHz RBW

Tetsuya Iizuka and 2 other authors

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