Skyrmions hold great promise for next generation computation due to their current-driven control, ultra-low power consumption, non-volatile characteristics, and nanoscale footprint. Any technology candidate for in-memory computing will need to use a universal set of logic gates as its building blocks such as NAND or NOR. Despite previous efforts on all-skyrmion logic gates, the logic inverter that is essential for Boolean logic operations has not yet been addressed under realistic conditions on materials, current drive and device geometries1-4 with simple current drive and robust operation against geometric defects and Joule heating. Here, we demonstrate a domain wall-gated nanoscale skyrmion logic inverter (NOT) and NOR gates based on Co/Pt bilayer cross junctions. The inverter operation is based on a logic input (0/1: skyrmion absence/presence) applied first along the vertical channel. If there is a skyrmion logic input, this skyrmion is driven by current and converted to a domain wall (DW) to fill the vertical channel. Next, a probing skyrmion is applied5 horizontally as in Fig. 1. When there is a DW in the vertical channel, the probing pulse coming from the horizontal channel is blocked (output 0, input 1). With no skyrmion in the input, a DW does not form and the horizontal probing skyrmion reaches the gate output (output: 1). A final DC pulse along the vertical channel is applied to clear the inverter for an arbitrary input in the next clock cycle. Our proposed logic inverter has small footprint (4 × 240 × 300 nm3), room temperature operation with realistic current drive (0.4-1.2 × 1012 A m-2), robust operation under imperfect sidewall and notch geometries, and higher temperature effects. The inverter consumes about 1350 kB per operation at room temperature in addition to Joule heating. Joule heating must be suppressed by using insulating magnetic layers for minimal thermal drift, although we show that the circuit equilibrates at slightly above room temperature due to heat conduction to the substrate. We also present a non-volatile NOR gate that consists of two junctions, which is sufficient to achieve all Boolean logic functionalities.

![](https://assets.underline.io/uploads/markdown_image/1/image/ae2dc196547c4f92b71fe7b9eb85df51.jpg)

Domain Wall-Gated, Cascaded and Low-Power Skyrmion Logic Gates with Robust Operation

Domain Wall-Gated, Cascaded and Low-Power Skyrmion Logic Gates with Robust Operation

**Session chair:** Daniele Pinna, Forschungszentrum Jülich


HOG - New Computation Schemes

technical paper

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Arash Mousavi Cheghabouri

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Domain Wall-Gated, Cascaded and Low-Power Skyrmion Logic Gates with Robust Operation

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