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Shinji Sugatani

Tokyo Institute of Technology, Institute of Innovative Research, Tokyo, Japan

bumpless

dram

redundancy

wafer-on-wafer

1

presentations

5

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SHORT BIO

Mr.Shinji Sugatani joined Fujitsu LTD. in 1981.He experienced process integration of nonvolatile memory and charge coupled device image sensor for five years. Following twenty years, he continued to engage in process integration of logic devices for computers of Fujitsu.He developed all CMOS technologies of from 0.12 micron to 90 nm, but except 130nm in Fujitsu.Next fifteen years, he joined to develop electron beam direct write technology in e-Shuttle and Advantest corporation.Currently he participates in the WOW alliance of Tokyo Institute of Technology for the research of wafer-on-wafer process integration.

Presentations

Vertically Replaceable Memory Block Architecture for Stacked DRAM Systems by Wafer-on-Wafer (WOW) Technology

Shinji Sugatani and 5 other authors

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