**Please read the paper on the following link:**

https://1worldcontent.com/ess/9072.pdf

**Abstract:**

Dark Count Rate (DCR) in Single-Photon Avalanche Diodes (SPAD) in Complementary Metal-Oxide Semiconductor technology is characterized and analyzed with a comprehensive simulation methodology. Based on a series of measurements of SPAD with various architectures, on an extended range of voltages and temperatures, the DCR measurements are correlated to the spatial localization of traps within the device and their parameters. To this aim, process and electrical simulations using Technology Computer-Aided Design (TCAD) tools are combined with an in-house McIntyre solver to compute the breakdown probability (Pt). The traps are accounted for using thermal SRH carrier generation-recombination mechanism which is coupled with the position-dependent breakdown probability. This rigorous methodology makes it possible to directly compare with DCR measurements, since only generated carriers with a non-negligible avalanche probability are considered.

Dark Count Rate in Single-Photon Avalanche Diodes: Characterization and Modeling Study

**Please read the paper on the following link:**

https://1worldcontent.com/ess/9265.pdf

**Abstract:**

This paper presents a new method to reliably simulate the PDE and jitter for realistic 3D device simulations of SPAD devices. This method is based on the use of electric field lines to mimic the carriers\' trajectories, which allows the transformation of a 3D problem into a multitude of 1D problems. This idea is applied to the McIntyre model for breakdown avalanche probability to calculate PDE, but also for jitter prediction using a dedicated advection-diffusion model. The results obtained numerically are compared with an extensive series of measurements and show a good agreement on a wide variety of device designs.

Comprehensive Modeling and Characterization of Photon Detection Efficiency and Jitter in Advanced SPAD Devices

**Session Chairs:** Antoine Dupret, CEA; Robert Henderson, University of Edinburgh

B1L-1: Imaging Arrays & Detectors

technical paper

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.

Highlights:
* 3 joint keynote presentations
* 3 keynote presentations ESSCIRC
* 3 keynote presentations ESSDERC
* Invited papers with overall coverage of all aspects of advanced devices and circuits
* Presentation of IEEE and ESSCIRC/ESSDERC Awards
* Educational Events

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Please register for the ESSCIRC conference to join the event.

ESSCIRC ESSDERC 2021

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.





**Session Chairs:** Wladek Grabinski, MOS-AK Association; Viktor Sverdlov, Technische Universität Wien

Mathieu Sicre

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SHORT BIO

Presentations

Dark Count Rate in Single-Photon Avalanche Diodes: Characterization and Modeling Study

Comprehensive Modeling and Characterization of Photon Detection Efficiency and Jitter in Advanced SPAD Devices

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