**Please read the paper on the following link:**

https://1worldcontent.com/ess/9219.pdf

**Abstract:**

This paper introduces a phase shifter based on switched filters for mm-wave 5G MIMO transmitters. It is realized in 22nm FD-SOI CMOS and exploits the use of back-gate biasing. The new approach features strong tolerance to process, voltage and temperature (PVT) variations and thus can maintain low phase error with fine phase tuning capability supporting a large bandwidth. Measurement results show that the 4-bit phase shifter achieves 3.5 degree rms phase error at 28 GHz. The proposed phase shifter can maintain <5 degree of the worst-case rms phase error when operating across 24 to 29.5 GHz resulting in 20.56% fractional bandwidth which is the largest among the published switched-filter phase shifters to date.

A 28-GHz Switched-Filter Phase Shifter with Fine Phase-Tuning Capability Using Back-Gate Biasing in 22-nm FD-SOI CMOS

**Session Chairs:** Michele Caruso, Infineon; Patrick Reynaert, Katholieke Universiteit Leuven

D2L-6: Wideband Transmitter Circuits

technical paper

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ESSCIRC ESSDERC 2021

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.





Enis Kobal

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A 28-GHz Switched-Filter Phase Shifter with Fine Phase-Tuning Capability Using Back-Gate Biasing in 22-nm FD-SOI CMOS

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