**Please read the paper on the following link:**

https://1worldcontent.com/ess/9201.pdf

**Abstract:**

This paper introduces a new architecture of a discrete-time charge-rotating low-pass filter (LPF) which achieves a high-order of filtering and improves its stop-band rejection while maintaining a reasonable duty cycle of the main clock at 20%. Its key innovation is a linear interpolation within the charge-accumulation operation. Fabricated in 28-nm CMOS, the proposed IIR LPF demonstrates a 1--9.9 MHz bandwidth programmability and achieves a record-high 120 dB stop-band rejection at 100 MHz while consuming merely 0.92 mW. The in/out-of-band IIP3 is +18.6/+26.6 dBm.

A Charge-Rotating IIR Filter with Linear Interpolation and High Stop-Band Rejection

**Session Chairs:** Viola Schaffer, Texas Instruments; Makoto Nagata, Kobe University

D1L-6: Analog Techniques

technical paper

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

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ESSCIRC ESSDERC 2021

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.





Amir Bozorg

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A Charge-Rotating IIR Filter with Linear Interpolation and High Stop-Band Rejection

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