**Please read the paper on the following link:**

https://1worldcontent.com/ess/9195.pdf

**Abstract:**

The persistent and switchable polarization of ferroelectric materials based on HfO2-based ferroelectric compounds, compatible with large-scale integration, are attractive synaptic elements for neuromorphic computing. To achieve a record current density of 0.01 A/cm2 (at a read voltage of 80 mV) as well as ideal memristive behavior (linear current-voltage relation and analog resistive switching), devices based on an ultra-thin (2.7 nm thick), polycrystalline HfZrO4 ferroelectric layer are fabricated by Atomic Layer Deposition. The use of a semiconducting oxide interlayer (WOx<3) at one of the interfaces, induces an asymmetric energy profile upon ferroelectric polarization reversal and thus the long-term potentiation / depression (conductance increase / decrease) of interest. Moreover, it favors the stable retention of both the low and the high resistive states. Thanks to the low operating voltage (<3.5 V), programming requires less than 10-12 J for 20 ns long pulses. Remarkably, the memristors show no wake-up or fatigue effect.

High-Conductance, Ohmic-Like HfZrO4 Ferroelectric Memristor

**Please read the paper on the following link:**

https://1worldcontent.com/ess/9231.pdf

**Abstract:**

Ge MFS capacitors with ultrathin ferroelectric HZO are prepared to fabricate FTJ devices. 5 nm HZO after wake-up show good reliability and excellent polarization switching characteristics featuring high remanent polarization Pr~ 22.2 μF/cm2 and low coercive voltage Vc ~ 1.1V. These performance characteristics create the prospect for low voltage (<2 V) /low power NVM FTJ memories. According to our modeling, 5 nm FTJs suffer from low Jon, but thinner HZO devices combine high Jon (>0.1 A/cm2) and relatively large TER (>70). A sufficiently large Jon has been measured on our 3-nm HZO FTJs, albeit with lower-than-expected TER and Ion/Ioff ratios.

Scaling Ferroelectric HZO Thickness for Low Power Ge MFS-FTJ Memories

**Session Chairs:** Manuel Le Gallo, IBM Zurich; Thomas Mikolajick, Namlab gGmbH and Technische Universität Dresden

B2L-1: Machine Learning & In-Memory-Computing with Emerging Technologies

technical paper

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.

Highlights:
* 3 joint keynote presentations
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* 3 keynote presentations ESSDERC
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Please register for the ESSCIRC conference to join the event.

ESSCIRC ESSDERC 2021

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.





**Session Chairs:** Qing-Tai Zhao, Forschungszentrum Jülich; Tortorelli Innocenzo, Micron Technologies

Bégon-Lours Laura

2

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SHORT BIO

Presentations

High-Conductance, Ohmic-Like HfZrO4 Ferroelectric Memristor

Scaling Ferroelectric HZO Thickness for Low Power Ge MFS-FTJ Memories

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