United States

For the first time, we characterize the advanced Black Diamond(R) low-k dielectric and develop a physical model of time dependent dielectric breakdown (TDDB). We use the developed model to explain underlying physical mechanisms responsible for the lifetime degradation from the various integration steps.

IRPS 2024 Main Conference

Characterization and multiscale modeling of TDDB in state-of-the-art BEOL

low-k dielectric

beol

reliability

technical paper

#### Welcome to the 62nd IEEE International Reliability Physics Symposium (IRPS)! 
**The 2024 IEEE International Reliability Physics Symposium (IRPS) will be held in Dallas, Texas from April 14 to 18, 2024. It will be presented as an in-person conference, with a virtual component available.** 

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**[IRPS 2024 eGuide](https://drive.google.com/file/d/1DHxkWbafodK_D2HlDi7lwRK7KatgBgBD/view?usp=drive_link)**

Please save the zip file locally and click the "start.pdf" to view the file. 
 
**IRPS 2024 General Chair Welcome Message**

On behalf of the Management Committee of the IEEE International Reliability Physics Symposium (IRPS) and the IRPS Board of Directors, it gives me great pleasure to extend a warm welcome to all who are planning to attend the IRPS 2024, scheduled to take place from April 14-18, 2024, in Dallas, TX. 
Over its 62-year history, IRPS has solidified its position as the premiere conference for engineers and scientists to present new and original work in the field of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and other parts of the world, IRPS aims to deepen our understanding of reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS offers diverse opportunities for attendees to enhance their knowledge and understanding of all aspects of microelectronics reliability. It is also an outstanding chance to meet and network with reliability colleagues from around the world.

The IRPS 2024 technical activities will begin with two days of a total of twenty tutorial sessions covering a broad spectrum of emerging reliability topics beyond CMOS device, circuit and system reliability. These sessions are devoted to both newcomers as well as experts. Three reliability Year in Review (YIR) talks focusing on neuromorphic computing, dielectric breakdown in leading edge devices, and GaN technology will be provided on Monday after the tutorials.

The IRPS 2024 technical program will feature four distinguished keynote talks in the plenary sessions delivered by Prof. Shinichi Takagi from The University of Tokyo and Dr. Su Jin Ahn from Samsung on Tuesday, Dr. Rajeev Malik from IBM on Wednesday, and Dr. Sameer Pendharkar from Texas Instruments on Thursday. The technical program, organized into three parallel tracks, consists of contributed and seventeen invited papers from leaders in industry and academia. Additionally, two invited talks by recipients of paper awards from our sister conferences, European Symposium on Reliability of Electron Device Failure Physics and Analysis (ESREF) 2023 and the International Integrated Reliability Workshop (IIRW) 2023, will be given in the technical program. 

Tuesday evening will host ten workshops, offering an opportunity for in-depth, face-to-face discussions on emerging reliability challenges, including the three IRPS 2024 focus topics. A poster session will be held in the Austin Ranch outside the symposium building on Wednesday evening. Both events are sure to be lively. The IRPS 2024 and the International ESD Workshop (IEW) will be co-hosted with IEW registrants participating in both IRPS and IEW programs.

The IRPS 2024 will adopt a hybrid conference style, allowing virtual access to live oral presentations hosted by the Underline. Real-time streaming of all technical events (excluding Workshops and Posters) will be available in the US Central Timezone, providing virtual attendees with Q&A opportunities. For those virtual attendees who cannot watch the live presentations, the material will be available on demand to all attendees after the symposium. All authors will be presenting in person.

Finally, I would like to extend my extreme gratitude to our patrons, exhibitors, and all participants for their invaluable support, which makes IRPS successful. 

Please enjoy the IRPS 2024!

Koji Eriguchi, General Chair 
of 2024 IRPS Management Committee
 
**About IRPS** 
The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all parts of the world, IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability, and to meet and network with reliability colleagues from around the world.

To access the site please register [**here**](https://www.irps.org/registration-fees). 

The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. 

Si-friendly HfO2-based ferroelectric devices including FeRAMs and FeFETs are promising for future integrated memory and AI applications with high energy efficiency. On the other hand, a variety of reliability issues can pose serious limitations on the practical applications. This presentation will discuss the promise and reliability of HfO2-based FeRAMs and FeFETs with an emphasis on ferroelectric film thickness scaling, and will also touch on a new AI computation using these devices, reservoir computing.

Hafnium-Oxide-Based Ferroelectric Devices for Low-Power Memory and AI Applications: Promises and Reliability Challenges

In the last decade, we have witnessed an unprecedented revolution of artificial intelligence (AI) as well as various smart devices such as smart phones, AV/VR devices, smart vehicles and robots. Semiconductor is a key player in this revolution as they are at the heart of many inventions related to the computing devices. These transformative trends of AI and smart devices will continue to open up explosive growth opportunities for the semiconductor community. 

Innovative Technologies for Sustainable Future of Semiconductor Industry

Determination of void nucleation from electromigration-induced critical stresses is a complex endeavor. In this study, we propose a combination of single link electromigration testing, augmented by large scale statistical evaluations, and physics-based simulations to extract the critical stresses. The calibration efforts lead to well-matched values of physical parameters such as effective diffusivity Deff, charge number Z*, and effective modulus B, and improve reliability assessments of early nucleation mechanisms down to the 4-sigma level.

A Novel Method for the Determination of Electromigration-Induced Void Nucleation Stresses

We propose a method to predict V-ramp V BD  using deep learning from OCD -spectrum. Through this, it was confirmed that inter-metal VBD degradation occurring in the LM layers of the COP structure V-NAND can be predicted. Modeling to predict VBD from OCD-Spectrum was performed using deep learning, and a highly accurate prediction model with R2 0.86 was obtained. Using this, V-ramp VBD can be predicted immediately at the process stage without waiting for fab-out.

V-ramp VBD Prediction Method Using OCD-spectrum and Deep-learning, and Application to Early Detection of V-NAND Low Metal Reliability Risk

In the semiconductor industry, enhancing the hardness of SiO x is an important issue. Previous studies have focused on the oxygen content dependence of hardness only in a limited region close to x = 2, where the hardness generally increases with increasing x. However, our exploration of SiO x revealed a different path to increase hardness: within the subregion 0 &lt; x &lt; 1.2, reducing the oxygen content led to an increase in SiO x hardness.

The Enhancement Mechanisms of SiOx Hardness via Manipulation of Oxygen Content

Total ionizing dose (TID) irradiation induced charge trapping and reliability are investigated in 3D sequential integrated (3DSI) devices and ICs. Strong, bias-dependent layer-to-layer coupling of TID response is observed. Ring oscillator (RO) response is consistent with the respective transistor responses in the upper and lower layers of the device structures. Circuit simulations reinforce the relative importance of transconductance degradation in pull-up pMOSFETs to the TID response of these ROs.

Charge Trapping in Irradiated 3D Devices and ICs

We evaluate the soft error rate (SER) in 18 nm FDSOI-planar SRAM and investigate the scaling trend of SER in FDSOI-planar. Our findings demonstrate that the SER in 18 nm FDSOI-planar is significantly lower than that of 28 nm FDSOI-planar. The total SER (aSER + nSER) in SRAM of 18 nm FDSOI-planar is lower than all the bulk-planar and bulk-FinFET technologies. We also examine the temperature dependence of SER in FDSOI-planar.

Comprehensive Study of SER in FDSOI-Planar: 28 nm to 18 nm Scaling Effect and Temperature Dependence

This report evaluates total ionizing dose degradation characteristics of ZnO and IGZO TFTs after x-ray irradiation. To fully understand the effect of the radiation on the two types of TFTs, we evaluated the structural, morphological, and binding states of the metal-oxide-semiconductor layers before and after X-ray irradiation.

Reliability Assessment of a-IGZO and ZnO Thin Film Transistors (TFTs) to X-ray irradiation

We present a comprehensive study on the gate stack TDDB challenges in Gate-all-around (GAA) nanosheet (NS) transistors (FETs), including volume-less multi-Vt integration and patterning, the performance and reliability trade-off in inner spacer (IS) module, and the impact from Si channel geometry on gate stack reliability. These scaling associated challenges served as strong motivators and will continue to drive process-reliability co-optimization efforts towards optimum performance while preserving robust TDDB reliability.

Challenges of gate stack TDDB in gate-all-around nanosheet towards further scaling

This interdisciplinary study explores LED device stability in extreme saline environments. Using machine vision and AI recognition, it monitors LED degradation, providing early warnings for maintenance. The research identifies material changes and offers solutions applicable in consumer electronics and maritime industrial settings.

Machine Vision Observation, Artificial Intelligence Pattern Recognition, Protective Circuit Design, Material Characterizations, and Nanostructural Analysis for Investigating InGaN Green Light Emitting Diode Degradation in a Saline Environment

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Characterization and multiscale modeling of TDDB in state-of-the-art BEOL

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Hafnium-Oxide-Based Ferroelectric Devices for Low-Power Memory and AI Applications: Promises and Reliability Challenges

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