VIDEO DOI: https://doi.org/10.48448/jmhj-dw08

poster

NSF Workshop on Micro/Nano Circuits and Systems Design

December 14, 2020

Live on Underline and hosted by University of Notre Dame, United States

Memory Processing Unit (MPU) - An Efficient, Reconfigurable In-memory Computing Fabric

Please log in to leave a comment

Downloads

SlidesTranscript English (automatic)

Next from NSF Workshop on Micro/Nano Circuits and Systems Design

Energy-Efficient Deep Neural Network Design: From Time-based Circuits to Layer-wise Pruning
poster

Energy-Efficient Deep Neural Network Design: From Time-based Circuits to Layer-wise Pruning

NSF Workshop on Micro/Nano Circuits and Systems Design

Chris Kim, Publicity Chair
Chris Kim, Publicity Chair

14 December 2020

Stay up to date with the latest Underline news!

PRESENTATIONS

  • All Lectures
  • For Librarians
  • Resource Center
  • Free Trial
Underline Science, Inc.
1216 Broadway, 2nd Floor, New York, NY 10001, USA

© 2023 Underline - All rights reserved