United States

Tetra Corporation is developing a pulsed power drilling system for the geothermal industry. The system requires a high temperature switching technology to replace the existing technology based on Si thyristors with a temperature limit of 150°C. This work focuses on the development of such switch based on a Supercascode configuration using SiC JFET technology. The development presented contains thermal models, packaging design and processes, circuit simulations and prototypes of both the Supercascode switch and the high temperature packaged SiC JFETs.

IEEE WiPDA 2022

Development of a 250°C 15kV SuperCascode Switch Using SiC JFET Technology

jfet

cascaded switch

supercascode

packaging

technical paper

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 The IEEE Workshop on Wide Bandgap Power Devices & Applications (WiPDA) provides a forum for device scientists, circuit designers, & application engineers from the Power Electronics & Electron Devices Societies to share technology updates, research findings, experience & potential applications.
 
 **Topics of interest**
* Heteroepitaxial & Bulk Materials Growth
* Gate Dielectrics & Surface Passivation
* Device Structures & Fabrication Techniques
* Device Characterization & Modeling
* Very-High Efficiency Or Compact Converters
* Safe Operating Areas Of Wide Bandgap Devices, including Short Circuit, Spike, &Transient Tolerance
* Harsh Environment (High Temperature) Operation & Reliability
* Packaging Power Modules & ICs
* Gate Drive & Other Auxiliary Circuits
* High-Performance Passive Components
* Hard-Switched & Soft-Switched Application Analysis
* Applications in Renewable Energy & Energy Storage, Transportation, Industrial Drives, Grid Power Systems, Space and Aerospace
* Wide Bandgap System Design Philosophies & Strategies
* Radio Frequency (RF) GaN
* Technology Roadmap of Wide Bandgap Including Devices, Applications and Packaging

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The IEEE Workshop on Wide Bandgap Power Devices & Applications (WiPDA) provides a forum for device scientists, circuit designers, & application engineers from the Power Electronics & Electron Devices Societies to share technology updates, research findings, experience & potential applications.

Packaging and integration of wide bandgap power semiconductors

Managing EMI of SiC power electronics

Reliability of SiC power devices for power conversion applications

Evolution of SiC substrate production understanding and managing defects in SiC

This paper investigates the failure modes of SiC MOSFETs-based passive voltage clamping dc solid-state circuit breakers (SSCBs). There are two major concerns of main SiC switch failure that are analyzed in this paper: 1) gate-source voltage ringing related switch degradation/failure when cutting off heavy fault current with high di/dt. 2) thermal runaway directly caused by the short circuit surge current in the main switch before the cut-off and transient power strike during cutoff. Two 10A/86A dc interruption experiments are conducted to demonstrate the failure caused by gate ringing due to the high di/dt issue coupled with unavoidable parasitic common source impedance of the device package. The thermal runaway failure due to the short circuit current surge and transient turn-off power strike is also demonstrated by a 631A dc interruption test. At last, an active commutation current injection scheme is discussed as future research trends to address the revealed gate ringing and cut-off power strike issues in SSCBs.

Short Circuit Fault Induced Failure of SiC MOSFETs in DC Solid-State Circuit Breakers

Insulated metal substrate (IMS) boards have been widely used in industry for their remarkable electrical and thermal performance. However, the IMS boards require a separate driver board that affects the power density. With Gallium Nitride enhancement-mode high electron mobility transistors (GaN E-HEMTs) being adopted in modern power converters, power density is becoming critical more than ever. This paper proposes the next generation of single-board IMS power stages (i.e., IMS4). In this board, the power board and the driver board are embedded into a single board. Furthermore, a CerStrate™ ceramic substrate single-board solution is proposed that maintains the exact electrical specifications as observed in IMS4 and significantly enhances the thermal performance. The superiority of these single-board solutions is verified through finite element analysis (FEA) simulations and experiments.

Next Generation of GaN Single-Board High Power Stages

In this work, Infineon’s 100V 3mΩ CoolGaN™ is evaluated and compared with a 100V similar Rdson MOSFET using OptiMOS™5 silicon technology in a three-phase inverter for battery powered motor drive applications. In order to minimize conduction losses, 30ns dead time is achieved for GaN due to its lower gate and output charge in comparison to 60ns of dead time for silicon. A motor-generator setup is developed to evaluate a 48V drone motor up to ~1kW of inverter power. For a motor speed of 4000RPM, with a bus voltage of 48V and 100 kHz switching frequency, GaN shows higher efficiency across the entire load range. At 1/3rd load (~300W), 98.67% and at full load (~900W) 98.10% power efficiency values are achieved. At light load (~45W), a significant increase of ~5% is also observed in efficiency. This experimentally demonstrates that 100V CoolGaN™ is ideal for developing high frequency switching inverters with high power densities and motor efficiencies in the kilowatt power range.

100V GaN for Highly Efficient 1kW Motor Drive Applications

This paper presents a compact three-level (3L) Gallium Nitride (GaN) power module with low parasitic parameters. The power loop, gate loop and PCB layout are designed and optimized carefully to achieve: 1) low parasitic parameters; 2) good thermal performance; 3) compact size and high integration; 4) easy utilization on building 3L ANPC converter. To achieve higher power rating, for two highfrequency (HF) switch legs, three GaN Systems’ GS665016T are paralleled and for the low-frequency pair, two switches are paralleled considering the much lower switching loss. The decoupling capacitors, driver circuits and auxiliary power supplies are all integrated into the module for the easy utilization and small parasitics. Double-pulse test (DPT) is applied to test the electrical characteristics and a bidirectional three-phase 3L ANPC converter is built using the proposed modules to verify the electrical performance and thermal performance.

Compact Three-Level GaN Power Module Suitable for Active-Neutral-Point-Clamped (ANPC) Three-Level Converter

The past decade has seen noticeable advancements in the miniaturization of wide-band gap semiconductor technology making it feasible to be applied in demanding applications such as more-electric-aircrafts (MEA). Multiple high speed electric motors operating in parallel with current ratings in hundreds of amps are required to match the power delivery capability of conventional jet engines. As a result, the power electronics driving the motors require special attention to parallel multiple active switches in order to meet the high current requirements. This paper presents the design of an axially stator mounted 250 kW integrated modular motor drive for MEA applications. The design considerations presented include optimal component placement and layer stackup to minimize voltage overshoots during switch commutation, optimal gate drive layout to synchronize the current sharing of multiple GaN active switches, and the selection process of the on-board current sensor. Lastly, experimental test results are presented that verify the efficacy of the proposed design.

Design of High Current, High Power Density GaN Based Motor Drive for All Electric Aircraft Application

This paper provides an optimization process of a 100-W three-level flying capacitor totem-pole PFC in USB TypeC Power Delivery (PD) for aircraft applications. The switching frequency and PFC inductor current ripple are varied to set the PFC inductance variation range and design the differential mode (DM) and common mode (CM) filter to meet the EMI requirement in the DO-160 standard. The design process for all the magnetic components is described with results at different switching frequencies and current ripples. The total volume and loss for all cases with both single-stage and two-stage filters are plotted and compared. Pareto fronts for the two cases are drawn to show the optimal design parameters for the application.

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Packaging and integration of wide bandgap power semiconductors

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RESOURCES

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