November 07, 2022
Minneapolis, United States
Thermal Variation of Thermal Stability Factor and Switching Efficiency of STT MRAM Devices
Spin-transfer torque magnetoresistive random-access memory (STT-MRAM) is a promising non-volatile memory technology for eliminating the classical von Neumann bottleneck to build a high-speed, energy-efficient memory hierarchy.1 One of the challenges that STT-MRAM needs to overcome, notably for automotive applications, is the robust and reliable operation in the temperature range of -40 °C to 150 °C.2 Therefore, it is vital to investigate STT-MRAM device characteristics as a function of temperature.
We investigated thermal stability factor (Δ), tunneling magnetoresistance (TMR) ratio, critical switching current (IC), and the other device parameters of STT-MRAM devices from -25 °C to 150 °C. Four different device wafers (W1-4) with increasing storage layer (SL) thicknesses and three different device diameters D1, D2, and D3 (with D1<D2<D3) were studied. The temperature-dependent behavior of Δ and TMR ratio were analytically modeled to understand their thermal variation. Figure 1 shows the experimental values of Δ, and the fitting of its thermal variation by macrospin and domain-wall model for device D2 in W1-4. Extrapolating the thermal variation of Δ, blocking temperatures (Tb) of different types of memory cells were calculated as shown in Fig. 1. It was observed that the magnetization reversal most likely occurs by domain wall motion at lower temperatures, which changes to multinucleation of domains at larger temperatures making Δ invariable with the diameter (not shown here). Figure 2 shows the thermal variation of practical switching efficiency (κ), calculated by considering Δ at different temperatures and IC at -25 °C. Similar to the variation of IC (not shown here), the κ at -25 °C increases with the thickness of SL. This improvement is believed to be due to the decrease in damping constant. This temperature-dependent investigation is important to understand the retention, writing, and reading performance of STT-MRAM cells for high-temperature applications.
References 1 B. Dieny, I.L. Prejbeanu, K. Garello, P. Gambardella, et al., Nat. Electron. 3, 446 (2020). 2 K. Lee, R. Chao, K. Yamane, V.B. Naik, et al., Tech. Dig. - Int. Electron Devices Meet. IEDM 2018-December, 27.1.1 (2019). 3 X. Feng and P.B. Visscher, J. Appl. Phys. 95, 7043 (2004).