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VIDEO DOI: https://doi.org/10.48448/fpmm-5z66
PAPER DOI: 10.1109/IRPS48227.2022.9764457

poster

IRPS 2022

March 28, 2021

Dallas, TX, United States

Voltage Surges by Backside ESD Impacts on IC Chip in Flip Chip Packaging

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Next from IRPS 2022

Combining Experiments and a Novel Small Signal Model to Investigate the Degradation Mechanisms in Ferroelectric Tunnel Junctions
poster

Combining Experiments and a Novel Small Signal Model to Investigate the Degradation Mechanisms in Ferroelectric Tunnel Junctions

IRPS 2022

Lorenzo Benatti
Lorenzo Benatti and 1 other author

28 March 2021

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