United States

Unlike traditional memories such as SRAM and DRAM, STT-MRAM has many advantages, especially non-volatility, which has attracted the attention of many researchers in recent years. Nowadays, MRAM is one of the most competitive candidates for next-generation memory. However, spintronic devices require large switching current to achieve fast switching speed, which leads to more power consumption and heat fluxes of MRAM. Power budget and thermal issues limit the 3D stacking of MRAM. Therefore, it is necessary to establish a thermal model of the power-related 3D stacked MRAM in the early stage of design.&lt;br/&gt;Since in the duality between thermal and electrical phenomena [1], heat flow is analogous to current, temperature is analogous to voltage, thermal conductance is analogous to electrical conductance, and thermal capacity is analogous to electrical capacitance, a RC thermal model can be established, which can avoid using computationally intensive and time-consuming detailed finite-element model [2]. Because 3D stacked MRAM faces cooling problems, it is not only necessary to consider the circuit-level memory layer when analyzing the thermal behavior, but also to take the heat sink responsible for heat dissipation into consideration from the perspective of package level and model together.&lt;br/&gt;The content of this paper is organized as follows. Section I is the introduction,which introduces 3D stacking technology and puts forward the thermal issues of 3D memory. Section II presents various thermal modeling approaches. Section III proposes a power and thermal model for 3D-stacked MRAM as shown in Fig. 1, which also including the simplified memory circuit. In Section IV, the effects of the number of stacked layers, the size of dies, power density, and heat dissipation capacity on temperature are evaluated based on the established RC thermal model. Section IV shows the conclusions. It is demonstrated that this model facilitates the communication between the circuit designer responsible for power consumption and the package designer responsible for heat dissipation in the early stage of MRAM design.

![](https://assets.underline.io/uploads/markdown_image/1/image/c2c6a421afbb60a422fb189be0aae3db.jpg)

A RC Thermal Model of 3D-Stacked Stand-alone MRAM

2022 Joint MMM-INTERMAG

A RC Thermal Model of 3D-Stacked Stand-alone MRAM

The 15th Joint MMM-INTERMAG Conference (2022 Joint) is sponsored jointly by AIP Publishing and the IEEE Magnetics Society. Members of the international scientific and engineering communities interested in recent developments in fundamental and applied magnetism are invited to attend and contribute to the technical sessions. The technical program will include invited and contributed papers in oral and poster sessions, invited symposia, a plenary session, and an evening session, with about 1500 presentations overall. This Conference provides an outstanding opportunity for worldwide participants to meet their colleagues and collaborators and discuss developments in all areas of magnetism research.

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This Conference provides an outstanding opportunity for worldwide participants to meet their colleagues and collaborators and discuss developments in all areas of magnetism research.

Unlike traditional memories such as SRAM and DRAM, STT-MRAM has many advantages, especially non-volatility, which has attracted the attention of many researchers in recent years. Nowadays, MRAM is one of the most competitive candidates for next-generation memory. However, spintronic devices require large switching current to achieve fast switching speed, which leads to more power consumption and heat fluxes of MRAM. Power budget and thermal issues limit the 3D stacking of MRAM. Therefore, it is necessary to establish a thermal model of the power-related 3D stacked MRAM in the early stage of design. Since in the duality between thermal and electrical phenomena [1], heat flow is analogous to current, temperature is analogous to voltage, thermal conductance is analogous to electrical conductance, and thermal capacity is analogous to electrical capacitance, a RC thermal model can be established, which can avoid using computationally intensive and time-consuming detailed finite-element model [2]. Because 3D stacked MRAM faces cooling problems, it is not only necessary to consider the circuit-level memory layer when analyzing the thermal behavior, but also to take the heat sink responsible for heat dissipation into consideration from the perspective of package level and model together. The content of this paper is organized as follows. Section I is the introduction,which introduces 3D stacking technology and puts forward the thermal issues of 3D memory. Section II presents various thermal modeling approaches. Section III proposes a power and thermal model for 3D-stacked MRAM as shown in Fig. 1, which also including the simplified memory circuit. In Section IV, the effects of the number of stacked layers, the size of dies, power density, and heat dissipation capacity on temperature are evaluated based on the established RC thermal model. Section IV shows the conclusions. It is demonstrated that this model facilitates the communication between the circuit designer responsible for power consumption and the package designer responsible for heat dissipation in the early stage of MRAM design.

![](https://assets.underline.io/uploads/markdown_image/1/image/c2c6a421afbb60a422fb189be0aae3db.jpg)

A RC Thermal Model of 3D-Stacked Stand-alone MRAM

poster

The realization of magnetization switching induced by in-plane current injection in heavy metal/ferromagnetic heterostructures has drawn increasing attention to spin-orbitronics, leading to the advent of spin-orbit torques magnetoresistive random access memories (SOT-MRAM). Compared to heavy metals, oxide 2D electron gases have emerged as alternative spin-orbitronics material systems, which benefit from an efficient spin-charge interconversion through the direct and inverse Edelstein effects. Recently, we have demonstrated an enhancement of the spin-to-charge conversion efficiency by two orders of magnitude in SrTiO3-based 2D gas compared to conventional heavy metals [1], along with a non-volatile electric-control of the spin-to-charge conversion [2]. While the sign and efficiency of the SOTs are fixed by the stack of materials in conventional SOT devices, achieving an electric-control of the mirror charge-to-spin conversion would be of great interest for developing reconfigurable SOT-MRAM and logic gates. Here we report electric-field control of spin orbit torques with electrical remanence in a perpendicular ferromagnet - SrTiO3 system. Non-volatile electric-field control of the sheet resistance is achieved with 1150% contrast, with two switchable and remanent high and low resistivity states of the 2D electron gas. Spin-orbit torques effective fields are further measured using second harmonic Hall methods. A remanent electric-field control of the SOT efficiency is demonstrated, with inversion of the sign of the SOT anti-damping-like effective field. These results are consistent with a combination of both intrinsic modulation of the SOT efficiency together with extrinsic modulation due to the non-volatile electric-control of the current injection in the 2D gas. The non-volatile control of the SOT effective field is further evidenced by reproducible inversion of the SOT torques after initializing with negative or positive voltage pulses of ±130 V, opening the way to reconfigurable spin-orbit torque memory and logic gate architectures.

![](https://assets.underline.io/uploads/markdown_image/1/image/c659e26f3f654d16f4c29d73b4605f6d.jpg)

Fig.1: (a) Structure of the sample and measurement geometry. (b) Electric-field control of spin orbit torques with electrical remanence.

Non-Volatile Electric-Field Control of Spin-Orbit Torques and Anomalous Hall Effect in Perpendicular Ferromagnet - SrTiO3 System

The magnetic tunnel junction (MTJ) has gained a lot of interest in neuromorphic computing owing to its tunable switching behavior. Particularly, the stochastic switching behavior of the MTJ provides an intrinsic capability to tackle computationally difficult problems in an energy efficient manner. At the architectural level, the potential associative ability of Boltzmann Machine (BM) allows it to make inference for the input patterns which is not included in the defined input set [1][2]. Motivated by the computational abilities of MTJ and associative abilities of Boltzmann Machine, in this work, we present the spin orbit torque (SOT) driven MTJ based Boltzmann Machine neural network for solving classification problems. We use a fixed learning approach to demonstrate the ability of the BM based topology. Stochastic MTJ neuron model is used in artificial neural network. The sigmoidal response of MTJ switching probability enables us to utilize the inherent stochastic device characteristic to be implemented as a stochastic unit in BM. Fig. 1(a) shows the sigmoidal switching response of the stochastic MTJ and Fig. 1(b) shows the magnetization dynamics of MTJ. We can clearly observe an SOT tunable stochastic switching behavior. The block diagram of the BM pattern classifier is shown in Fig. 2(a), where each neuron in first layer is connected to output neuron via a fixed weight. To ensure inhibitory connection, the output from each neuron acts as input to rest of the output layer. The average value of the output for all possible outcomes of neurons and for the particular case of specific output to be high (for O2 and O6) is shown in Fig. 2(b). Based on input pattern and synaptic configuration only one output has high value and a winner takes all (WTA) circuit will be able to select the desired output, signifying the proper classification problem. Finally, we conclude by discussing the applicability of these device models and architectures for various other unconventional tasks such as combinatorial optimization and probabilistic inference.

![](https://assets.underline.io/uploads/markdown_image/1/image/d6dec4c4276171978a280d8974d529be.jpg)

(a): Acceptance probability vs difference function in BM (b) Stochastic switching behavior of SOT driven MTJ.

![](https://assets.underline.io/uploads/markdown_image/1/image/4d6347c0a39efe2f8c22e4b90aa8a17a.jpg)

(a): MTJ based BM architecture. (b) Mean value of output neuron layer.

Spin Orbit Torque Driven Stochastic MTJ Neuron-based Boltzmann Machine for Pattern Classification Application

Oscillator-based data-classification schemes have been proposed recently using the Kuramoto model which predicts synchronization behaviour of coupled oscillators through a general framework neglecting underlying physics [1,2]. Here we propose hardware implementation of a Kuramoto-model-based data-classification scheme through an array of dipole-coupled uniform-mode spin Hall nano-oscillators (SHNOs) [2,3]. Using micromagnetic simulations on 'mumax3' software [4], which actually capture physics of SHNOs, we first study how synchronization range between two uniform-mode SHNOs (150 nm diameter) varies with physical distance between them (Fig. 1b). Thus we correlate the coupling constant in Kuramoto model (Fig. 1a) with dipole-coupling strength between two SHNOs in 'mumax3' (Fig. 1b) . Using this correlation, we generate a synchronization map for a two-input-two-output dipole-coupled uniform-mode SHNO system through micromagnetics (Fig. 2a). Red circles show frequency values of input oscillators (F1,F2) for which the two output oscillators are synchronized, and black circles show (F1,F2) for which they are not. These data points coincide with pink region showing sync. and grey region showing de-sync., obtained from Kuramoto model (Fig. 2a). Thus we establish here that synchronization behaviour of SHNOs obtained from physics-based modeling (micromagnetics) is consistent with that obtained from Kuramoto model, where underlying physics of SHNOs is ignored. This shows that a Kuramoto-model-based data classification scheme [2] can indeed be implemented on an array of SHNOs. Next we show, through micromagnetics, classification of data from a popular data set (Fisher's Iris [5]) using an array of uniform-mode SHNOs. While distinguishing flowers in Iris of Setosa type from Virginica type, output oscillators synchronize for Setosa and desynchronize for Virginica (Fig. 2b). The obtained accuracy is 98.67%

![](https://assets.underline.io/uploads/markdown_image/1/image/76425c03e78db7f1e75e35cd0fc9ffbe.jpg)

Fig. 1. For a two-oscillator system, coupling constant in Kuramoto model (a) is correlated with distance between two SHNOs in micromagnetics (b) using the synchronization-range values.

![](https://assets.underline.io/uploads/markdown_image/1/image/894a943d95a0240af6a1aeeb9c7fd828.jpg)

Fig. 2. Synchronization map of the two-input-two-output oscillator system in (a) (details in text) used for data classification from Iris set (b)

Kuramoto-Model-Based Data Classification Using the Synchronization Dynamics of Uniform-Mode Spin Hall Nano-Oscillators

In spin orbit torque MRAM, the magnetization of the free layer is erratically switched at the time of reading. We previously proposed a bi-directional read method as a solution to reduce this read disturbance [1]. We examined the size dependence of the effect with this method [2], and the threshold current became constant as the size increased in the short-side direction (Fig. 1(a)). In this study, including the elucidation of this behavior, we compared the size dependence of the movement during magnetization switching between conventional method and our method, and examined the effect of reducing the disturbance. Figures. 1 (c) to (f) are graphs of magnetization switching, and Fig. 2 shows the state during the magnetization switching in the short-side direction. In conventional method, when X was 30 to 60 nm, the magnetization was switched in the monodomain, and when X was 90 to 180 nm, a magnetic domain was formed once and the magnetization was switched due to the movement of the domain wall. Magnetization switching in both directions can suppress magnetization reversal because a spin current in the opposite direction is generated, but when the threshold current is exceeded, the magnetization state becomes unstable. When X is 30 to 60 nm, the monodomain is disrupted and magnetization is switched, and when X is 90 to 180 nm, the magnetization is switched by the movement of the domain wall from the switched magnetic domain. Therefore, the threshold current becomes constant while the size increases in the short-side direction because the magnetization is switched by the generation of the magnetic domain and movement of the domain wall. In the long-side direction, the magnetization is switched by the generation of magnetic domains, because the shape anisotropy strengthens the connection of magnetic domains and the current for switching one magnetic domain increases as the size increases.

![](https://assets.underline.io/uploads/markdown_image/1/image/350c1be3b15b035b5718734851aa7037.jpg)

Fig. 1(a) Comparison of conventional and our method threshold currents for different sizes.
(b) The magnetoresistive element.
(c) Time-dependent magnetization.

![](https://assets.underline.io/uploads/markdown_image/1/image/f49e4bba05ecc0c35966d9bfc9dcdafb.jpg)

Fig. 2 Magnetization with conventional method.
(a) Initial magnetization at 30 × 30 nm.
(b), (c) Magnetization switching at 30 × 30 nm.
(d), (e) Domain wall movement at 120 × 30 nm.

Examination of Magnetization Switching Behavior by Bi-directional Read of Spin Orbit Torque MRAM

MRAM is a non-volatile memory technology that stores a bit as a magnetic state of a ferromagnetic CoFeB free layer which either aligns or anti-aligns with a fixed CoFeB layer, where these two layers sandwich a non-magnetic MgO layer, shown in fig.1a. The modern market is predominantly dynamic and static RAM which are both volatile which requires large amounts of power in high peformance clusters. MRAM is ultrafast and durable while scaling to volumes smaller than the limitations of SRAM and DRAM, attracting significant research and development.[1]To achieve practical applications, MRAM must display high thermal stability, a high tunnel magnetoresistance ratio and a low writing current at competing volumes. A recent development with potential to achieve this scalability is to use tower structures with height greater than the diameter, which allows the perpendicular shape anisotropy and the interfacial perpendicular magnetic anisotropy to favour out-of-plane magnetisation.[2]For reliable MRAM, the switching mechanism at operational temperatures needs to be understood. This study uses atomistic simulations which model the tower structure with varied free layer thicknesses using two anti-ferromagnetically coupled CoPt layers to pin the fixed layer, with a monolayer either side of the MgO with enhanced exchange coupling and uniaxial anisotropy. The system is modelled using a spin Hamiltonian with thermal fluctuations and dipole fields included with the LLG.[3]We have found in fig.1b(i) that the susceptibility of the free layer varies hugely as the volume is increased, but dividing these taller towers into smaller local regions in fig. 1b(ii) we find smaller and correlated curves. This shows the magnetisation is non-uniform throughout the tower, which may suggest a non-uniform magnetisation mode. In fig. 1c(i) we see snapshots of the reversal process at 50K demonstrating nucleated domain wall reversal mode in taller towers, while fig.1c(ii) shows the switching is coherent for smaller towers.

![](https://assets.underline.io/uploads/markdown_image/1/image/3dbfeaa4ddcc03812f89632cb15415c0.jpg)

Figure 1 a) The structure of the PSA MRAM b) i) The susceptibility for the whole free layer ii) The susceptibility of 10nm parts of the 48nm tower c) i) Nucleated reversal in the 48nm tower ii) Coherent rotation in the 10nm tower

Atomistic Study of the Thermodynamic Properties and Switching Dynamics of Perpendicular Shape Anisotropy MRAM

Neuromorphic computing is attracting the attention of researchers for its usefulness in ultra-low-power computing applications1. Among the several magnetic and non-magnetic candidates to achieve low-power neuron and synaptic devices, the domain wall magnetic tunnel junctions (DW-MTJ) are the most promising contenders for energy efficiency. However, to realize the synaptic functions in neuromorphic devices, one must achieve multi-resistance states. The pinning sites can aid in achieving the required multi-resistance states2. Therefore, we propose meander DW devices, where segments of DW-MTJ wires join at an offset, which alters the energy landscape locally and helps in achieving deterministic DW motion. To study the proposed concept, we optimized the DW-MTJ stack with the perpendicular magnetic anisotropy to achieve a higher tunnel magnetoresistance (TMR) of 169% and a high RA (resistance-area product) of 241 Wmm2 suitable for DW devices with a large area. Subsequently, we measured the magnetic hysteresis (M-H) loops of the thin films to observe the layer-wise switching along with magnetic field variation (fig. 1 (a)). We have also measured the minor loop (fig. 1 (b)) and found that the coercivity of the free layer is ~21 Oe, which is suitable for energy-efficient DW motion. Next, we optimized the fabrication process for 3-terminal synaptic devices (fig. 1 (c)). We fabricated a sequence of devices with a DW-MTJ wire width w = 10 mm and corresponding offset (d) values ranging from 40% (of w) to 70% in the steps of 10%. Further, we fabricated three types of devices for every offset; (i) constant offset, increase in offset by (ii) 5%, and (iii) 10% over successive pinning sites. Finally, we performed field and current-driven DW motion experiments and witnessed the synaptic functions. Here we present the results of field-driven DW motion in fig. 1 (d). The stack details, process insights, and experimental findings will be presented in detail during the conference.

![](https://assets.underline.io/uploads/markdown_image/1/image/5676d1e7a6f58421533aa347a7748345.jpg)

Figure. (a) M-H loop of the full stack, (b) minor loop illustrating the switching of the free layer, (d) micrograph of the 3-terminal synaptic device, and (e) read-out TMR signal of field driven-DW motion.

Terminal Domain Wall Device Based Synapses for Neuromorphic Computing

Encoding information in thin films with perpendicular magnetic anisotropy (PMA) holds promise for the next generation of data storage and logic operation applications [1]. Thin films with a large coercivity provide high stability of the encoded information but cause a high energy cost of writing data [2]. Therefore, reducing coercivity while writing data is a practical method to decrease the energy cost. Here, we experimentally demonstrated the control of coercivity in a PMA film using surface acoustic waves (SAWs), which can introduce oscillating strain waves in the thin films over millimetric distances. Two interdigitated transducers (IDTs, Fig.1a), whose centre frequency is 93.35 MHz (Fig. 1b), were patterned on opposite ends of a 2-mm-wide stripe of Ta(5.0 nm)/Pt(2.5 nm)/Co(1.1 nm)/Ir(1.5 nm)/Ta(5.0 nm) film. The film was dc magnetron sputtered onto a lithium niobate (LiNbO3) substrate, which supports the SAW propagation. A wide-field Kerr microscope was used to measure the hysteresis loops of the film with SAW both on and off at room temperature. Results showed that the coercivity of the thin films without SAW is 4.93±0.06 mT (Fig. 2a). Owing to the magnetoelastic coupling effect [3,4], the standing SAWs locally reduce the anisotropy and thus the thin film coercivity, which can be controlled by the applied SAW power. Coercivity reduction, which is enhanced by increasing the SAW power, can be up to about 18% for an input SAW power of 28 dBm (4.04±0.09 mT, Fig. 2b). Coercivity reduction only occurs at the centre frequency (Fig. 2c), which rules out the effect of a rising temperature that a SAW potentially can cause. This study indicates the possibility of remote and energy-efficient control of magnetization switching.

![](https://assets.underline.io/uploads/markdown_image/1/image/7651ddbabe3b6a643e873d0705d1cff0.jpg)

Fig.1 (a) Diagram of experimental setting-up. Interdigitated transducers (IDTs) were patterned by the side of the Ta(5.0)/Pt(2.5)/Co(1.1)/Ir(1.5)/Ta(5.0) film (thickness in nm). Hysteresis loops were taken by a Kerr microscope. (b) S-parameters of the IDTs (centre frequency of 93.35 MHz).

![](https://assets.underline.io/uploads/markdown_image/1/image/3e15320f4d7d218cf345ab83929d079e.jpg)

Fig. 2 (a) Hysteresis loops and (b) coercivity of the thin film under various surface acoustic waves (SAW) power (23 to 28 dBm) at 93.35 MHz. (c) Coercivity of the thin films under various frequency at 28 dBm.

Coercivity control of thin films with perpendicular magnetic anisotropy by surface acoustic waves

As a promising non-volatile memory, Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) suffers from high error rate due to stochastic switch [1]. Some papers use Error Correcting Code (ECC) with powerful error correction capabilities to suppress high error rate, which lead to high delays and high check bit consumption. According to published reports, the error occurring of STT-MRAM is a serious asymmetry phenomenon [2]. The write error rate of 0 → 1 is much higher than that of 1 → 0 since 0 → 1 transition requires higher energy to ensure reliably commute the value. The traditional ECC approaches for other kinds of memories are designed for symmetric error correcting, which are not suitable for STT-MRAM. A weighted error correction mechanism is proposed and fulfilled in the paper, which can be used for the asymmetric error situation. Firstly, the codewords are weighed by estimating the different probabilities of error in state 0 and 1. In STT-MRAM, the error occurrence rate on state 0 is much higher than that on state 1. Through the check matrix, the words can be preliminarily judged to determine which bits may be wrong. Through the different weights of data 0 and 1, a bit with the highest error probability can be calculated. Then this bit is flipped to get a new codeword, which is substituted into the check matrix again to get a new error situation. The process of WECC is shown in Fig.1. If situation improves, the new codeword can be kept. Otherwise, the previous substitution operation is cancelled. In order to ensure the effectiveness of the error correction mechanism, the assistance of other ECCs such as BCH or LDPC is usually required. The error correction mechanism proposed in the paper can effectively reduce the error correction delay and decrease the check bit consumption. A virtual system in GEM5 is built up to evaluate the proposed WECC mechanism. The simulation results are used for the analysis of the error correction algorithm, showing the effectiveness of the WECC proposed in the paper for STT-MRAM.

![](https://assets.underline.io/uploads/markdown_image/1/image/fa6a1883b97a9ef7b919f61da0895f72.jpg)

Fig.1 Process of WECC

Weighted Error Correcting Code (WECC) against Asymmetric Error of STT-MRAM

Spin transfer torque[1] is an important phenomenon in order to develop of non-volatile magnetic memory. Using this spin transfer torque principle, it was predicted[2] and experimentally confirmed[3] that a voltage could be generated in the magnetic nanostructure. This effect is called spin motive force and is expected for next-generation power sources. It is not clear how the Faraday electromotive force[4] can be separated from the spin motive force, and there are few studies reported and the spin motive force in µV class. It is very small. To greatly increase the value, we fabricated Gd21(Fe75Co25)79 magnetic wire and succeeded in generating a spin motive force by domain wall motion. We prepared the following film stacks using rf and dc magnetron sputtering: Gd21 (Fe75Co25)79 (20)/SiN (10), the films are grown at the room temperature. The magnetic wires (3 µm wide and 125 µm long) and Hall crosses were micro-fabricated by an Electron-beam lithography (EBL) system and a lift-off method. Next, we prepared two types of samples, a sample with injection of domain wall and a sample without injection of domain wall. A magnetic field was applied to the sample, and the generated voltage was observed by an oscilloscope through a 100x amplifier. Spin motive force is determined by subtracting the induced electromotive force generated in the sample without injection of domain wall. Figure 1 (a) shows the spin motive force measurement system. Figure 1 (b) shows the value of the spin electromotive force by subtracting the induced electromotive force. As a result, a huge spin motive force of 12 mV was obtained. This is financially supported by KAKENHI 918023,918055,918043.

![](https://assets.underline.io/uploads/markdown_image/1/image/36414d6f67eeb09c3efa72deacf02c73.jpg)

![](https://assets.underline.io/uploads/markdown_image/1/image/f9d644bd049228bbbc961dd9398e36c1.jpg)

Milli volt class spin motive force due to domain wall motion in GdFeCo magnetic wire

Milli volt class spin motive force due to domain wall motion in GdFeCo magnetic wire

Spin transfer torque (STT) magnetic RAM (MRAM) is one of the promising emerging memory technologies, which combines endurance, speed and energy efficiency of SRAM and DRAM with non-volatility of flash [1]. However, the write speed and write power consumption is a major challenge for the establishment of STT-based storage devices in universal memory [2]. In the paper, the Early Write Termination (EWT) technology combined with the pipeline architecture is co-designed for the STT-MRAM to improve the write efficiency. In the traditional write operation, the original stored data is directly overwritten by the new data, without concerning on whether the new data is the same as the original data or not. There exists unnecessary operation if the written data is the same as the stored ones, which leads to the write power consumption. To avoid the unnecessary write operation, a pre-charge sense amplifier is used to sense the stored data in advance. Only the new data is allowed to be written into the memory cell when the new data is different from the stored data. Moreover, considering the delay of the additional circuits, the pipeline architecture is also applied on the STT-MRAM. Several latches operating in response to a clock signal to process the data by dividing the write operation into a plurality of stages and carrying out them in pipelining manner [3]. Pipeline technology can process multiple instructions in parallel, greatly increasing the average write speed. The proposed write strategy of STT-MRAM achieves better write efficiency and lower power consumption, which has potential application in STT-MRAM in the future.

![](https://assets.underline.io/uploads/markdown_image/1/image/f0a4a9c940c5ec9c080f178a3a404143.jpg)

![](https://assets.underline.io/uploads/markdown_image/1/image/1b90046cd006ea471df66745127b56fd.jpg)

The fast write strategy of STT-MRAM with pipeline architecture

A RC Thermal Model of 3D-Stacked Stand-alone MRAM

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