France

This tutorial is to present how chips can be protected against fault injection attacks by using internal sensors.
It gives an overview of sensors to detect different types of fault injection techniques like electromagnetic and laser shots. It presents a generic digital sensor and gives some perspectives for future research topics.

ESSCIRC ESSDERC Educational Events

ON Chip Security Sensors

digital sensor

emfi

fault injection attack

#### Welcome to the 60th IEEE International Reliability Physics Symposium (IRPS)!

[![](https://assets.underline.io/uploads/markdown_image/1/image/f6b8cf9ecca2209dd3e0fcebe80a2915.png)](https://underline.io/events/282/reception) [![](https://assets.underline.io/uploads/markdown_image/1/image/e787ff477f8d2b687fb0b54d83d35e11.png)](https://drive.google.com/drive/folders/1GAycr7pPrZG2ZzZP-geUL8vGWswjCB1N?usp=sharing) [![](https://assets.underline.io/uploads/markdown_image/1/image/7492fafcc0c623afe96fe15207855ed9.png)](https://www.irps.org/)
 

**General Chair Welcome Message**

Welcome to IRPS 2022! When the IRPS Management Committee began making plans for Dallas, we recognized the strong desire by the reliability physics community to return to a face-to-face symposium that we last had in Monterey in 2019. But as time progressed, we recognized that travel restrictions were not being lifted as rapidly as we anticipated. Rather than leave out those of you who could not attend in person, we adopted a hybrid format allowing for both remote attendance and remote presentations. This is a first for IRPS and I am confident it will be a success for all.

With this new hybrid format, the symposium will return to the original five-day format with Tutorials and Year in Review on the first two days. The Technical Program, Keynote Talks, Workshops and Poster session will be held on the following three days. All of these (except Workshops and Posters) will be available via real-time streaming in the US Central Time zone with virtual attendees having Q&A access to the presenters. For those virtual attendees who cannot watch the live presentations, the material will be available on demand to all attendees for a month after the symposium with the ability to communicate with the authors.

In 2020, we were planning on co-hosting the International ESD Workshop (IEW) ESD workshop when the COVID-19 pandemic hit. For 2022, IEW will be seamlessly embedded into the IRPS Program and will sponsor three tutorials, an invited talk, two technical sessions and two evening workshops focused on ESD and latch-up. And we continue our
collaboration with our sister conference, European Symposium on Reliability of Electron Devices Failure Physics and Analysis (ESREF) by hosting their Best Paper and the International Integrated Reliability Workshop (IIRW) by hosting their Best Student Paper.

Our primary objective is to maintain the symposium’s leadership role in the reliability physics of microelectronic devices by attracting leading researchers to present their work and providing attendees the best place to access this information. With all the buzz in the media about whether Moore’s Law has hit its limit, IRPS has been promoting expertise developed in silicon-based reliability over the past sixty years and expanding into new material areas. This year, eight of the technical sessions are devoted to reliability in topics outside of traditional silicon, including wide bandgap GaN/SiC, emerging memory and neuromorphic computing. I hope our ability to draw these communities together will accelerate the cross-fertilization of ideas. 

The Technical Program consists of four keynote speakers, twenty-three invited speakers and eighty-seven oral presentations organized in thirty technical sessions on eighteen reliability topics. Over two evenings, there will be ten Workshops and sixty-six Poster presentations that are designed to allow in person attendees and experts to interact
with one another. With eighteen tutorials covering topics ranging from fundamental transistor and memory reliability all the way up to automotive and complex system-level reliability, this year’s symposium provides an excellent learning opportunity for engineers and scientists new to reliability as well as experienced individuals wanting to explore new
areas. The Year in Review, which serves as a summary of research in the past year, will cover 3D packaging, emerging memory and aging aware circuit designs.

Finally, I would like to express my extreme gratitude to our patrons and exhibitors, whose support makes IRPS possible.
And to all of you, our in person and virtual attendees, for supporting this symposium for sixty years!

**Charles W. Slayman, General Chair** 
**of 2022 IRPS Management Committee**
 
**About IRPS**

The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all parts of the world, IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability, and to meet and network with reliability colleagues from around the world.

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Registration for this conference has now closed. We appreciate your interest and hope to welcome you at a future event. If you’d like to hear about similar upcoming events, please check our website or join our mailing list.

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IRPS 2022 Main Conference 

IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability. It is also an outstanding chance to meet and network with reliability colleagues from around the world.

tutorial

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.

Highlights:
* 3 joint keynote presentations
* 3 keynote presentations ESSCIRC
* 3 keynote presentations ESSDERC
* Invited papers with overall coverage of all aspects of advanced devices and circuits
* Presentation of IEEE and ESSCIRC/ESSDERC Awards
* Educational Events

JOINT PLENARY talks live broadcast: September 13, 2021 
ESSCIRC and ESSDERC KEYNOTE talks live broadcast: September 15, 2021 
LIVE Q&A INTERACTIVE sessions for all Conference Technical sessions: September 14 – 16 – 17, 2021 
LIVE Q&A INTERACTIVE sessions for all Educational Events: September 20-21-22, 2021 
(on demand videos available from September 6 until November 30, 2021)

**Please see here for the [ESSCIRC Guide](https://drive.google.com/file/d/10dghzuv4aQBty4QfTIY9Q8hXyqsue8Le/view?usp=sharing), [ESSDERC Guide](https://drive.google.com/file/d/10dx9y2tm9cHPDa4upNUYjfXCf44aPry5/view?usp=sharing), and the [Program at a Glance](https://drive.google.com/file/d/10eU0OLTXEpiNzI5hkqv4mSr43T8cedPP/view?usp=sharing)**

Please register for educational events at the following link: https://www.registerme.eu/event/esscirc-essderc-2021/

Please register for the ESSCIRC/ESSDERC Educational Events to join the event.

The Educational Events of ESSCIRC ESSDERC 2021. 

In this talk, the design of jointly optimized broadband electronics and photonics underlying next-generation (>100GBaud) coherent transceivers is addressed. It is shown how to use SiGe BiCMOS to achieve complex functionality such as interleaving and equalization at analog bandwidths as high as 90GHz. Examples are provided how functionality such as equalization traditionally implemented in the electronics domain can be implemented in a photonic integrated circuit. Finally, options such as micro-transfer printing to densely integrate front-end electronics with optical modulators and detectors are presented.

Co-design and integration of broadband electronic and photonic IC’s for next-generation optical transceiver applications

This presentation describes the evolving landscape of 77-
81GHz automotive radar transceivers and shows the opportunities and challenges ahead in the quest for higher sensing performance.

77 – 81GHz high performance car radar

Advanced radar solutions for automotive applications

A low-power radar solution for vital signs detection and indoor people sensing is presented. A basic radar theory and design challenges are discussed. How to choose frequency band is explained. System analysis including link budget, dynamic range and LO phase noise, is offered. 
A low power UWB FMCW radar IC is introduced with detailed measurement results as an example.

Low-power 8GHz radar for vital sign monitoring

Millimetre-wave frequency synthesis for RADAR ICs can rely on frequency multiplication. Here the local-oscillator signal – whether a frequency chirp for FMCW or a fixed carrier for PMCW – is first synthesized by a lower-frequency PLL. In case of FMCW, a two-point PLL-based frequency modulator can deliver a large-bandwidth fast chirp, which boosts range resolution and maximal detectable speed. The lower-frequency PLL signal is then distributed and multiplied in frequency at each antenna path. Such a multiplication can be based on harmonic boosting or subharmonic injection locking. All these techniques, which modulate or multiply frequency, are introduced and demonstrated through some implementations in advanced CMOS.

Frequency synthesis for mm-wave radars

This presentation discusses system level considerations about FMCW radar systems. Next, we show two examples of 60GHz CMOS radar and 122GHz BiCMOS radar. Finally, we look into the future and discuss the future development of radar systems.

System and circuit challenges towards high performance radar sensors

As part of the Circuit and systems for RF/mm-wave sensing educational session, in this presentation we focus on the electromagnetic aspects of near-field sensing. We give a high-level overview of the aspects that come into play, approaches that can be used, and challenges, illustrated with examples.

Close proximity methods for RF sensing: an electromagnetics perspective

In this tutorial, entropy generation for ubiquitous hardware security is introduced from first principles to state-of-the-art techniques. Weak and strong physically unclonable functions are presented along with true random number generators.
General trends are analyzed and quantified to identify the most promising solutions for next-generation secure systems. The data presented are based on the HWsecdb public database created and maintained by the research group of the speaker, and are extensively used to make sense of prior art and emerging trends.

Entropy Generation for Ubiquitous Hardware Security

In this talk we survey the concepts of side-channel leakage evaluation and simulation. We present recent simulators and tools for those challenging issues .

Automated power-analysis leakage evaluation and elimination: from Elmo to Rosita

Symmetric cryptography is one of the most used building block today in the field of security. Very often is implemented in hardware, from microcontroller to high end x86 CPU, like the case of AES. From the end of '90 side channel attacks have been presented as a threat to cryptographic implementation, in this presentation we give an introduction to symmetric key cryptography, to side channel attacks, and the new wave of permutation based cryptography and the advanced possibilities of using permutation based crypto for implementing side channel resistant cryptographic hardware.

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Next from ESSCIRC ESSDERC Educational Events

Co-design and integration of broadband electronic and photonic IC’s for next-generation optical transceiver applications

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Exploring Fault Injection Attack Resilience of Secure IC Chips

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