United States

Abstract Body: Metal oxide semiconductors such as indium gallium zinc oxide (IGZO) and indium zinc oxide (IZO) have received significant attention over the past few decades due to their desirable electrical and optical properties. Sol-gel techniques are commonly employed to deposit these materials because of the simplicity of the synthesis and the ability to easily tune the film composition. These sol-gel based oxide semiconductors often demonstrate high field-effect mobility even in the amorphous phase, but temperatures of at least 300 C are typically required to decompose the sol-gel and form high-quality semiconductor film. The desire to create high-quality flexible transistors on low-temperature plastic substrates has driven an investigation into alternative thermal processing methods for oxide semiconductors. One such option being explored is pulsed-light processing based on flashlamps, commonly known as photonic curing. Photonic curing offers advantages over conventional thermal processing methods such as ultra-short processing time and compatibility with low-temperature substrates. However, previous work on photonically cured thin-film transistors (TFTs) often results in significant heating of the entire substrate rather than just the thin film at the surface. In this talk, we will discuss our recent work using photonic curing to rapidly and effectively convert metal oxide sol-gels to realize high-quality TFTs. Sol-gel indium zinc oxide (IZO) based TFTs are photonically cured with efficient molybdenum gate absorbers using a xenon flashlamp (NovaCentrix PulseForge 1300) using intense white light delivering radiant energy up to 6 Jcm-2. Simulations indicate that the IZO film reaches a peak temperature of ~590 C while the back of the glass substrate stays near room temperature. This process yields TFTs with a field effect mobility above 20 cm2V-1s-1 and an IOn/IOff ratio approaching 108, which exceeds the performance of samples annealed at 500 C for 1 hr. We will discuss the requirements and design guidelines for photonic curing metal oxide semiconductors for high-performance TFT applications, focusing on the importance of effective gate absorbers and optimized pulse designs to efficiently and effectively cure the sol-gel films.

EMC 2021

Photonic Curing of Solution-Processed Indium Zinc Oxide Thin-Film Transistors

tfts

oxide semiconductors

photonic curing

[![](https://assets.underline.io/uploads/markdown_image/1/image/985c8a40b04e56675221c8549975de3c.png)](https://drive.google.com/file/d/1B70nPIeeeqdG4UU70NlYXuKVOHLRuJEo/view?usp=sharing)

### ** History of DRC**
The Device Research Conference (DRC) began in the pre-transistor era with the 1942 establishment of the Conference on Electron Device Research (CEDR). Following William Shockley’s 1948 CEDR presentation of the transistor device, the Solid-State Device Research Conference (SSDRC) was established, with invitation-only attendance.

In the ensuing decades, many exciting firsts were presented at SSDRC, including the use of impurity diffusion in silicon and germanium, the first practical MOSFET, and the first lattice-matched heterojunction.

In 1969, under the leadership or Herbert Kroemer and Cal Quate, the CEDR and SSDRC merged into DRC. In 1970, attendance was opened to all, and the first DRAM (dynamic random-access memory), room temperature lasers, and first CCD (charge-coupled device) were reported—all in the same 1970 DRC meeting!

1976 saw the first official coordination of tandem meetings between DRC and the Electronic Materials Conference (EMC) to bring together the electronic materials and device communities—a custom which persists to this day. In 1991, DRC began publishing its digest with IEEE; they can all be found [here on IEEE Xplore](https://ieeexplore.ieee.org/xpl/conhome/1000199/all-proceedings). Throughout this period, DRC featured reports of many novel and record-setting devices, including the HEMT (High Electron Mobility Transistor), VCSEL (Vertical Cavity Surface Emitting Laser), HBT (Heterojunction Bipolar Transistor), and nanoscale MOSFETs.

In recent years, DRC has continued to be the world’s premier forum to present innovative semiconductor device research with work on organic thin film transistors, graphene and carbon nanotube transistors, and 2D materials all featuring prominently in the 1990s through to the present day. In 2017, we celebrated DRC’s 75th anniversary with special sessions and an [article in the Journal of the Electron Device Society](https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8168249&isnumber=8232486). DRC technical topics continue to evolve with emerging device trends such as memory devices, quantum devices, optoelectronics/photonics, and wide bandgap power devices to reflect the exciting work being done by a diverse community of device engineers around the globe.

Today, as we look forward to the next 75+ years of device innovation, DRC continues to lead the way in showcasing top-caliber research, facilitating vibrant discussion and debate and acting as a platform to nurture the next generation of device engineers. We welcome you to join us at the next DRC!

To learn more about DRC's history, please see [Aaron Franklin, Debdeep Jena and Deji Akinwande, "75 Years of the Device Research Conference—A History Worth Repeating," in IEEE Journal of the Electron Devices Society, vol. 6, pp. 116-120, 2018. doi: 10.1109/JEDS.2017.2780778](https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8168249&isnumber=8232486).

### **Topics**
* Biological Devices
* Devices for Extreme Conditions
* Heterogeneously Integrated Devices
* Memory Devices
* Modeling and Simulation of Devices
* Nanoscale and Vacuum Devices
* Optoelectronic and Optical Devices
* Other Emerging Devices
* Power Devices
* Quantum Devices
* RF and Terahertz Devices
* Spintronic and Magnetic Devices
* Thin-film Devices
* Wide-bandgap Devices
 
### **Invited Speakers**
* Patrick Fay, University of Notre Dame
* Susanne Hoffmann-Eifert, Peter Grünberg Institute
* Sanghyeon Kim, Korea Advanced Institute of Science and Technology
* Sriram Krishnamoorthy, University of California, Santa Barbara
* Mario Lanza, King Abdullah University of Science and Technology
* Xiuling Li, The University of Texas at Austin
* Marko Radosavljevic, Intel Corporation
* Siddharth Rajan, The Ohio State University
* Giordano Scappucci, Delft University of Technology
* Fisher Yu, University of Arkansas
* Wenjuan Zhu, University of Illinois at Urbana-Champaign




Registration is required to attend this event. If you have not already done so, please use the link below to register for a ticket to the conference:

https://www.mrs.org/drc-2022/registration

Registration Is Required

DRC 2022

DRC continues to be the world’s premier forum to present innovative semiconductor device research with work on organic thin film transistors, graphene and carbon nanotube transistors, and 2D materials all featuring prominently in the 1990s through to the present day. In 2017, we celebrated DRC’s 75th anniversary with special sessions and an article in the Journal of the Electron Device Society. 
DRC technical topics continue to evolve with emerging device trends such as memory devices, quantum devices, optoelectronics/photonics, and wide bandgap power devices to reflect the exciting work being done by a diverse community of device engineers around the globe.

technical paper

The Electronic Materials Conference (EMC) is the premier annual forum on the preparation, characterization and use of electronic materials. This year’s event will feature a plenary session, topical sessions, a poster session and more.

EMC is coordinated with the Device Research Conference (DRC), which will be held during the same week, from June 20-23. This recognizes the strong interaction between device and electronic materials research and provides fruitful exchange of information between attendees of both Conferences.

![](https://assets.underline.io/uploads/markdown_image/1/image/eb26c24a18d5d1030616afa4f993cf89.png)
	
<a href="https://www.mrs.org/docs/default-source/meetings-events/mrs-conference-services/2021/emc-2021/2021-emc-program-at-a-glance-6-16-21.pdf?sfvrsn=e39f950c_4">Latest Program-at-a-Glance</a>

<a href="https://drive.google.com/file/d/1eiS1ao4p83VNy8xgHs3Rls7gTQjx7Rc4/view?usp=sharing">Full Program with Abstracts</a>

Abstract Body: Low work function (WF) materials are necessary for energy storage and conversion devices. Scientific literature is full of explorations made in this field with new and emerging technologies applied to different elements with the purpose of creating low work function materials in the bulk and low dimensional regime. Alkali metals and their alloys with tin, cobalt, indium, etc. have been researched very well in batteries and other energy devices. Alkali metals have been shown to effectively aid in reducing the WF of many metals including Pb, Indium, tin, etc. Particular focus has been laid on Sn/Li alloy system where a work function dip up to 1.25 eV has been shown for a stoichiometric ratio of Sn2Li5[1][2]. Of course, this has been demonstrated to occur in the bulk alloys. However, with the purpose of achieving a similar goal in low dimensions (thin films), we are demonstrating for the first time the formation of a thin film of low work function Sn/Li alloy, formed using physical vapour deposition technique (E-Beam and Thermal Evaporation) at Ultra High Vacuum (UHV) conditions. The experiment utilises the high-end NanoESCA facility at the University of Bristol, UK, where the in situ deposition and the characterisation using X – Ray photoemission spectroscopy (XPS), Ultra-Voilet photoemission spectroscopy (UPS), spot profile low energy electron diffraction (Spa-LEED) techniques is carried out.[3]. In the initial experiments, a single crystal Si substrate was heated at a temperature of 800 oC for the removal of contaminants and Sn was deposited using the E beam deposition while Li was deposited using thermal evaporation method on Si substrate. Si surface was found to be terminated with the oxygen atoms. This should be the reason for the further lowering of WF as oxygen has been found to improve the sticking coefficient between the terminating metal species and the substrate surface. In the beginning, the O terminated Si surface was seen to possess a WF of 4.65 eV and a characteristic 2×1 LEED surface pattern which was then lost due to the disordered Sn and Li layers on the surface. However, Sn 3d peak was seen to shift towards the lower binding energy (B.E.) characteristic of the formation of Sn/Li alloy[4]. The WF was seen to lower to 4.15 eV and the surface was seen to become ordered after going through a series of annealing steps i.e., at 200 oC and 300 oC for 1 hour each and then 350 oC for 2 hours. After the 350 oC anneal, the LEED pattern started emerging. However, the Sn 3d peak was shifted to higher B.E. again which demands further analysis in order to find the optimised stoichiometric ratio between S/Li for ultra-low work function demonstration. [1] K. P. Loh, X. N. Xie, S. W. Yang, J. S. Pan, and P. Wu, “A spectroscopic study of the negative electron affinity of cesium oxide-coated diamond (111) and theoretical calculation of the surface density-of-states on oxygenated diamond (111),” Diam. Relat. Mater., vol. 11, no. 7, pp. 1379–1384, Jul. 2002, doi: 10.1016/S0925-9635(02)00014-6. [2] B. B. Alchagirov, R. K. Arkhestov, and F. F. Dyshekova, “Electron work function in alloys with alkali metals,” Tech. Phys., vol. 57, no. 11, pp. 1541–1546, 2012, doi: 10.1134/S1063784212110023. [3] G. Wan, M. Cattelan, and N. A. Fox, “Electronic structure tunability of diamonds by surface functionalization,” J. Phys. Chem. C, 2019, doi: 10.1021/acs.jpcc.8b11232. [4] D.-T. Shieh, J. Yin, K. Yamamoto, M. Wada, S. Tanase, and T. Sakai, “Surface Characterization on Lithium Insertion/Deinsertion Process for Sputter-Deposited AgSn Thin-Film Electrodes by XPS,” J. Electrochem. Soc., vol. 153, no. 1, p. A106, Dec. 2006, doi: 10.1149/1.2133711.

Investigation of Lithiated Tin (Sn/Li Alloy) Thin Film as a Low Work Function Termination on Silicon/Diamond Substrates

Abstract Body: Zinc germanium nitride (ZnGeN2) is the II-IV-N2 analogue of GaN which has a band gap (Eg) very close to that of GaN (~3.4 eV) and a lattice mismatch of <0.1% with GaN [1]. Based on first principles calculations, the predicted valence band offset (VBO) of ZnGeN2 with GaN can be as high as 1.4 eV, [2] which provides great opportunities to design high efficiency InGaN/ZnGeN2 heterostructure quantum wells for visible light emitters [1]. However, there has been no report on the experimentally determined VBO at the ZnGeN2/GaN heterointerface, due to the lack of availability of high quality materials. In this work, we have experimentally determined the VBOs of ZnGeN2 and a 94% ZnGeN2 – 6% GaN alloy ((ZnGe)0.94Ga0.12N2) with GaN using Kraut’s method. The VBO between two materials A and B are determined using the core energy levels (ECL) in bulk A, bulk B and at the A/B heterointerface and the position of the valence band maxima (VBM) in bulk A and bulk B. X-ray photoemission spectroscopy (XPS) was used to measure the ECL and VBM values. To determine the VBO between ZnGeN2 and GaN, a GaN/c-sapphire template, a 16-nm-thick ZnGeN2 film and a 2-nm-thick ZnGeN2 layer grown on GaN template were used as the bulk GaN, bulk ZnGeN2 and ZnGeN2/GaN heterostructure, respectively. ZnGeN2 films were grown on GaN/c-sapphire templates via metalorganic chemical vapor deposition (MOCVD) [3,4]. By using the measured Zn 3d (Ge 3d) core levels from ZnGeN2 and the Ga 3d core levels from GaN, the VBO of ZnGeN2 with GaN was extracted to be 1.45±0.15 eV (1.65±0.15 eV). These values are comparable to the values predicted from first-principles calculations using explicit interface calculations [2]. Similarly, the VBO of (ZnGe)0.94Ga0.12N2 with GaN was determined. The samples used include a GaN/c-sapphire template as bulk GaN, a 20-nm-thick (ZnGe)0.94Ga0.12N2 films as bulk (ZnGe)0.94Ga0.12N2 and a 3-nm-thick (ZnGe)0.94Ga0.12N2 film as the (ZnGe)0.94Ga0.12N2/GaN heterostructure. These samples were grown on GaN/c-sapphire templates via MOCVD. The experimentally extracted VBO of (ZnGe)0.94Ga0.12N2 with GaN was 1.29±0.15 eV. Assuming a linear dependence of the VBO with composition x of (ZnGe)1-xGa2xN2, the predicted VBO of (ZnGe)0.94Ga0.12N2 from the theoretically calculated VBO of ZnGeN2 would be 1.32 eV. Thus, the experimentally measured VBO results agree well with the theoretically predicted values. The conduction band offsets were derived using the determined VBO values and the energy band gap Eg of the materials. The band gaps of ZnGeN2 and (ZnGe)0.94Ga0.12N2 were estimated from the inelastic energy loss features of N 1s peaks in the XPS spectra of 16-nm-thick ZnGeN2 and 20-nm-thick (ZnGe)0.94Ga0.12N2 samples. The Eg values determined by this method were 3.0±0.2 eV for ZnGeN2 and 3.1±0.2 eV for (ZnGe)0.94Ga0.12N2. The lower values of Eg as compared to the predicted band gap values (~3.4 eV) can be due to the presence of disorder in the cation sublattice. In conclusion, the valence band offsets of MOCVD-grown (ZnGe)1-xGa2xN2 with GaN, with x = 0 and 0.06 were determined experimentally using XPS. The measured VBO values are comparable to the predicted values from first-principles calculations. The results from this study will expand device designs based on pure III-nitrides to III-nitrides/II-IV-N2, which can potentially address key challenges in III-nitride based electronic and optoelectronic device technologies. This work is supported by the U.S. DOE (DOE SSL: DE-EE0008718) and by the NSF (DMREF: SusCHeM: 1533957). References 1. L. Han, K. Kash, and H. Zhao, J. Appl. Phys., 120, 103102 (2016). 2. A. P. Jaroenjittichai, S. Lyu, and W. R. L. Lambrecht, Phys. Rev. B., 96, 079907(E) (2017). 3. M. R. Karim, B. H. D. Jayatunga, M. Zhu, R. A Lalk, O. Licata, B. Mazumder, J. Hwang, K. Kash, H. Zhao, AIP Adv. 10, 065302 (2020). 4. B. H. D. Jayatunga, M. R. Karim, R. A. Lalk, O. Ohanaka, W. R. L. Lambrecht, H. Zhao, and K. Kash, Cryst. Growth Des., 20, 189 (2020).

Experimental Determination of Valence Band Offsets of ZnGeN2 and (ZnGe)0.94Ga0.12N2 with GaN

Abstract Body: ZnGeN2 and GaN are nearly lattice matched and each have band gaps of approximately 3.4 eV. The large band offset of 1.4 eV in the conduction band results in a type II band alignment that has great potential for novel device structures such as high-performance LED structures that emit wavelengths beyond green [1,2]. Recently published work included theoretical predictions revealed a slightly positive mixing energy, indicating a tendency toward phase separation [3], and the lowest energy configuration to be the octet-rule-preserving Pmn21 phase for ZnGeGa2N4. Other compositions can be rendered by random stacking of ZnGeN2 and GaN layers along the orthorhombic b axis in octet-rule-preserving (and hence lower energy) phases. [3] MOCVD growth of this alloy on c-, r-, and a-plane sapphire and c-GaN/sapphire substrates showed that films of 50-50 composition exhibit better surface morphologies when grown on r-sapphire substrates. A surprising trend of increasing Zn incorporation with increasing Ga was noted. The optimal growth temperature and pressure were determined to be 670 0C and 550 torr at which the highest growth rate, 3.46 µm/hr, was obtained for a film grown on r-sapphire. This film also yielded a wurtzite (110) 2θ-ω XRD diffraction peak at 2Θ = 57.700 with FWHM of 0.760 and the lowest RMS surface roughness over an area of 1 μm2 , ~ 10 nm measured by AFM. [4] The only other experimental work on this alloy reported to date employed a gas reduction nitridation method for synthesis of powders of different compositions, from pure ZnGeN2 to a 50-50 mixture, for photocatalytic applications [5]. Recent progress in growth and characterization is reported here. Atomic-resolution HAADF-STEM images show single-crystal atomic arrangements within 2-3 nm of the substrate interface. The lattice parameters a, b and c measured from these images are 6.429 ± 0.012 Å, 5.585 ± 0.079 Å, and 5.252 ± 0.085 Å, respectively. Introduction of a low-temperature ZnGeN2 buffer layer (480 oC at 600 torr) improved the surface morphology, resulted in higher Hall mobilities, and gave band edge photoluminescence at approximately 3.5 eV, close to the predicted value for the Pmn21 phase. [3] Evaluation of several growth experiments with respect to resulting surface morphology and x-ray rocking curve peak line widths show that the optimal growth conditions for ZnGeGa2N4 with low-temperature ZnGeN2 buffer layers differ significantly from the optimal growth conditions for ZnGeN2 without the low-temperature ZnGeN2 buffer layers. To obtain optimal, nearly stoichiometric ZnGeGa2N4 films, the precursor DEZn flow rate was reduced by nearly half of that used in the same system for optimal ZnGeN2 growth at the same temperature. This reduction in DEZn flow rate also allows for the achievement of higher growth temperatures for ZnGeGa2N4 than for ZnGeN2 while avoiding Zn depletion. Growth of a quaternary alloy with composition approximately 25:75% ZnGeN2 : GaN also resulted in a continuous film with similar surface morphology, and an rms surface roughness of 10.2 nm over an area of 1 μm2. This work is supported by the U.S. DOE (DOE SSL: DE-EE0008718) and by the NSF (DMREF: SusCHeM: 1533957). [1] L. Han, K. Kash, H. Zhao, J Appl Phys 120, 103102 (2016) [2] M. R. Karim, H. Zhao, J Appl Phys 124, 034303 (2018) [3] B.H.D. Jayatunga, S. Lyu, S. Kumar, K. Kash, W. R. L. Lambrecht, Phys Rev Mat 2 (2018) [4] B. H. D. Jayatunga, Md R. Karim, R. A. Lalk, O. Ohanaka, W. R. L. Lambrecht, H. Zhao, and K. Kash, Crystal Growth & Design 20, 189-196 (2020) [5] T. Suehiro, M. Tansho, T. Shimizu, J Phys Chem C 121, 27590 (2017)

Progress in MOCVD Growth and Characterization of ZnGeGa2N4 Films

Abstract Body: There is a significant scientific and technological interest in the epitaxial integration of ferromagnetic or antiferromagnetic materials with the topological insulators (TI). This allows the introduction of the ferromagnetic order into a topological insulator system and may lead to the development of novel spin electronic devices. It is anticipated that these heterostructures can be used as novel magnetoresistive random access memory (MRAM) devices with high charge-to-spin conversion efficiency. This implies that TI-based heterostructures can switch between 0 and 1 memory states much more efficiently, while consuming lower energy than the state-of-the-art magnetic tunneling junction-based heterostructures that use transition metals. The TI-based devices will be less susceptive to weak disorder and perturbations since writing process will occur via conventional writing field while electrical read out process will be topologically protected. A key requirement for an operational heterojunction is a successful coupling of a TI with the magnetic material, which is facilitated by “atomically-clean” and abrupt junction interface. This should involve low-temperature deposition of the magnetic layer on the TI surface. This eliminates usage of the standard magnetic materials growth techniques, such as molecular beam epitaxy (MBE) and pulsed laser deposition, as they require the substrate temperatures greater than 300-350 0C, above what TIs can survive. Here, we report on the innovative approach to grow a room-temperature antiferromagnetic semiconductor (MnTe) using atomic layer deposition (ALD) and to epitaxially integrate it with the topological insulator (Bi2Te3). MnTe films were deposited at <100> GaAs and <111> InP. While the MnTe at <100> GaAs were polycrystalline, epitaxial growth was achieved at closely lattice-matched <111> InP at temperatures as low as 120 0C. Bi2Te3 was grown by MBE at c-Al2O3, ex-situ transferred into the ALD system, and used as a template for MnTe growth. High-resolution X-ray diffraction studies demonstrated that epitaxial MnTe growth was achieved at 120 0C. Transmission electron microscopy showed that the MnTe / Bi2Te3 interface was atomically sharp. No amorphous and / or disordered regions were present at the interface within the imaged regions. Magnetotransport properties of the ALD-grown MnTe were also studied and will be reported here. In summary, ALD was successfully used for the low-temperature epitaxial integration of MnTe antiferromagnetic semiconductor with the Bi2Te3 topological insulator. This opens the path for the realization of near-room temperature energy-efficient spintronic devices.

Low-Temperature Epitaxial Growth of Anti-Ferromagnetic MnTe at Bi2Te3

Abstract Body: Dimensionality is the determining critical parameter in any material. Graphene and transition metal chalcogenides are two-dimensional (2D) layered nanomaterials which demonstrate wide array of physical and chemical properties when approaching few-layer thicknesses [1-2]. Large lateral size of these van der Waals nanomaterials with thinner mono- or few-layered flakes possess higher aspect ratios, which makes them suitable for electronic and optoelectronic applications. Among the most reliable techniques for exfoliation, sonication-assisted liquid-phase exfoliation (LPE) is considered to be a simple and cost-effective method for preparing graphene and its 2D inorganic counterparts at reasonable sizes and acceptable levels of defects. Although there were rapid advances in this field, improper sonication may result in unstable dispersions with wide flake sizes and thicknesses distributions, impurities and defects. Previous studies were mainly focused on the effects of solvent selection (predominantly, using high-boiling point solvents or surfactants), sonication time, and power input (usually, high power from probe/tip sonication can cause significant damage to the material). However, the effect of the sonication frequency is poorly understood and often ignored resulting in a low exfoliation efficiency. Here, we demonstrate that simple mild bath sonication at high frequency at relatively low powers contributes to the thickness, size and quality of the final exfoliated products. We show that monolayer graphene flakes can be directly exfoliated from graphite using only ethanol as a solvent at a reasonable sonication time by increasing the frequency of the bath sonicator from 37 kHz (which is usually used) to 80 kHz. The key mechanism involved is the generation of small-sized bubbles resulting from higher frequencies, which can easily penetrate between the interlayer spacing of the 2D materials to facilitate the delamination process with reduced damage to the material [3]. Detailed morphology studies by atomic force microscopy (AFM) indicate that the obtained product is dominated by large lateral size (10-15 μm) monolayer graphene flakes. High resolution TEM (HRTEM) show that the graphene flakes are of high-quality without any significant structural defects, although X-ray photoelectron spectroscopy (XPS) shows evidence of a small oxide population. Additionally, we show that this facile technique can be applied to other inorganic 2D nanomaterials such as digenite (Cu9S5) and silver sulfide (Ag2S). This simple and effective method facilitates graphene and transition metal chalcogenides’ processing for a wide range of applications. References [1] Coleman et.al, Science, 2011, 331, 568-571. [2] Novoselov et.al, PNAS, 2005, 102, 10451-10453. [3] Merouani et.al, Ultrason Sonochem., 2013, 20, 815-819.

Higher Ultrasonic Frequency Liquid Phase Exfoliation as a More Efficient Method to Deposit Monolayer to Few-Layer Flakes of 2D Layered Materials

Abstract Body: Two-dimensional transition metal carbides and nitrides, so-called MXenes, have quickly attracted intensive attention and have found quite promising applications in various fields, such as water desalination, energy storage, catalysis, etc. These cutting-edge applications require the production of high quality MXene nanosheets with a high concentration. However, this has proven to be quite challenging. Here in this talk, I will describe the synthesis of high-quality MXene nanosheets, followed by the oxidation stability mechanism of MXene aqueous solutions, which is quite important for the long shelf life and is the prerequisite for the industrial application of MXenes.1 Then I will show the importance of the viscous inks in the efficient fabrication of high-performance transparent conductive films/coatings,2 scalable production of micro-supercapacitors assisted by the additive-manufacturing techniques (Figure 1).3 The ink viscous nature also allows the MXene nanosheets to perform as a conductive binder for Si nanoparticles, resulting in high mass-loading MXene/Si anodes with an ultrahigh areal capacity (Figure 2), which is 5 times higher than that of commercial anode.4 In addition, I will show the formulation of organic MXene inks for scalable additive-free printing of energy storage devices, as well as the formulation of composite ink for Lithium-sulfur batteries (Figure 3).5 We therefore believe the high-quality MXene inks hold a bright future for the next-generation energy storage devices at a low cost.

High-Quality MXene Inks for Energy Storage

Abstract Body: Sustainable energy storage devices demand new materials for energy storage systems, which alleviate their cost and increase longevity. A prominent energy storage technology for modern applications is Lithium-ion batteries. In this regard, two-dimensional (2D) materials attracted substantial and considerable attention due to their unique properties and abundant potential in various applications, including batteries1. Controllable synthesis of 2D materials with high quality and better efficiency is essential for their large scale applications, such as their functions as electrode material in batteries. The methods for the synthesis of two-dimensional materials include exfoliation, solvothermal, and chemical vapor deposition (CVD) routes, among which CVD offers better quality, efficiency, and consistency. In this perspective, the family of 2D transition metal di-chalcogenides (TMDCs) gained significant attention for their ability to store metal ions such as Li, Na, and Mg. TMDCs of group 6 transition metals (MX2 where M = Mo, W, and X = S, Se, Te) have a lamellar structure (space group P63/mmc) similar to graphite but with larger interlayer spacing. Tungsten di-chalcogenides are significant here because of the larger size of W that provides a further alteration of the 2D structure and has been successfully utilized for various applications such as photodetectors, field-effect transistors (FETs), etc. The typical group 6 TMDC lattice structure show W atoms confined in a trigonal prismatic coordination sphere neighbored to Se atoms. Because of its very high density (~9.32 g cm−3), WSe2 also has a high volumetric capacity, thereby proving it as a prospective LiB electrode material2. Our work focuses on a facile synthesis of 2H-WSe2 on W foil in the ambient-pressure chemical vapor deposition system using only Argon as carrier gas during the reaction. Extensive characterization of the bulk and exfoliated material confirm that the as-synthesized 2H-WSe2 is layered (i.e., 2D). XRD (X-Ray Diffraction) confirms the phase. At the same time, HRSEM (High-Resolution Scanning Electron Microscopy), HRTEM (High-Resolution Scanning Electron Microscopy), and AFM (Atomic Force Microscopy) clarify the morphology of the material. FIB-SEM (Focused-Ion Beam Scanning Electron Microscopy) estimates the depth of the 2H-WSe2 formation on W foil around 5-8 μm and Raman/UV-Vis measurements prove the quality of the exfoliated 2H-WSe2. The redox processes of Lithium-ion Battery (LiB) studies show an increase in capacity until 500 cycles. On prolonged cycling, the discharge capacity till the 50th cycle at 250 mA/g, the material shows a stable capacity of 550 mAh/g. These observations indicate exfoliated 2H-WSe2 has promising applications as LiB electrode material. References (1) Xia, H.; Xu, Q.; Zhang, J. Recent Progress on Two-Dimensional Nanoflake Ensembles for Energy Storage Applications. Nano-Micro Lett. 2018, 10 (4), 1–30. https://doi.org/10.1007/s40820-018-0219-z. (2) Share, K.; Lewis, J.; Oakes, L.; Carter, R. E.; Cohn, A. P.; Pint, C. L. Tungsten Diselenide (WSe2) as a High Capacity, Low Overpotential Conversion Electrode for Sodium-Ion Batteries. RSC Adv. 2015, 5 (123), 101262–101267. https://doi.org/10.1039/C5RA19717A.

Scalable Synthesis of Few-Layered 2D Tungsten Diselenide (2H-WSe2) Nanosheets Directly Grown on Tungsten (W) Foil Using Ambient-Pressure Chemical Vapor Deposition for Reversible Li-Ion Storage

Abstract Body: The formulation of inks based on 2D materials could enhance the performance of and provide new functional behaviors to printed electronics while retaining scalable manufacturing processes. Recent advances in solution-based exfoliation have demonstrated that the electronic properties of single semiconducting 2D nanosheets can be preserved during ink processing, but there remain several challenges to the production of thin-film transistors based on printed 2D materials. In addition to minimizing inter-sheet resistivity and preserving bulk-like mobilities, the local electronic properties and microstructure of the composite material must be optimized to minimize the resistance of overlapping nanosheets (i.e. junction resistance). To rationally guide the development of 2D inks and related processing, we explored the design principles by integrating device modeling with electrical and scanning probe characterization on transistors consisting of partially overlapping 2D channels (Figure 1a). We examined the limiting factors to the junction resistance by benchmarking a gate-dependent resistor network model with experimentally measured electrical characteristics for model MoS2/MoS2 homojunctions and utilized the model to quantify performance trade-offs determined by nanosheet thickness, percent overlap, sheet resistance and inter-sheet resistivity. Kelvin probe force microscopy (KPFM) was used to measure the surface potential profiles in transistor channels as a function of applied bias conditions and morphological characteristics such as nanosheet thickness. Detailed analysis of the abrupt potential drop measured at the conformal edge provides evidence that the on-state transistor performance of overlapping nanosheets is limited by the local sheet resistance (Figure 1b), which is likely due to weakly screened trapped charges at the edge state. This suggests that passivation and/or functionalization schemes targeting the edges of nanosheets could greatly improve transistor performance. Moreover, we found that screening of the upper portions of overlapping nanosheets produces current crowding at junctions between the edge of one nanosheet and the basal plane of another. Reducing the nanosheet thickness (i.e. the number of layers) increases the carrier concentration of the top nanosheet, thus distributing the current over longer distance and facilitating efficient inter-sheet charge transfer (Figure 2a), which increases the effective mobility and optimum percent overlap (Figure 2b). This provides further motivation to develop exfoliation schemes that preserve intrinsic monolayer properties.

Towards the Rational Design of Printed 2D Materials

Abstract Body: Tungsten ditelluride (WTe2) is a layered, type-II Weyl semimetal transition metal dichalcogenide (TMD) typically observed in a distorted 1T (1T’) phase with an orthorhombic crystal structure comprised of planes of distorted triangular lattices of tungsten atoms sandwiched by tellurium atoms. The distortion pushes tungsten atoms closer together in the x-axis than the y or z-axis, generating quasi-one-dimensional chains of these atoms, leading to strongly anisotropic electronic properties throughout the material. It has been shown to have extraordinary physical properties, such as a high magnetoresistance, anisotropic ultra-low thermal conductivity and metal-insulator transition and it also exhibits interesting quantum phenomena such as the quantum spin-Hall effect and pressure-driven superconductivity. These unique properties make WTe2 an exciting candidate for emerging applications, including phase change memory electrodes, magnetic field sensors, biosensors, microelectromechanical systems, hard disk drives and quantum computing. While bulk crystals of the material have been available for many years, to date, thin films of WTe2 have only recently been synthesized using techniques such as molecular beam epitaxy and powder source chemical vapor deposition (CVD) that utilize Te powder and W-feedstock. These techniques, however, have a number of challenges including tellurium dimer formation, that can severely hinder growth with high dissociation energies, and the use of salt assisted growth promotors during CVD growth which could contaminate future device fabrication. Metalorganic CVD (MOCVD) growth is of interest as it enables precise delivery of precursors to the substrate at moderate growth pressures (100-700 Torr), while proper precursor selection mitigates the Te dimer formation, but has not yet been studied in detail. In this study, we investigate the use of MOCVD for the growth of WTe2 on c-plane sapphire substrates. The studies were carried out in a vertical cold wall MOCVD reactor using tungsten hexacarbonyl (W(CO)6) and diethyltelluride (DETe) as precursors for W and Te, respectively, in a H2 carrier gas. Initial studies, carried out at 100 Torr reactor pressure using a W(CO)6 flow rate of 1.3 x10-4 sccm and Te/W ratio of ~8000 : 1, demonstrate the growth of centimeter scale WTe2 as confirmed by Raman spectroscopy and X-ray photoelectron spectroscopy (XPS). Additional studies to elucidate the growth mechanism and properties of MOCVD grown WTe2 were then undertook. The growth rate was found to decrease with increasing temperature over the range of 350 - 600oC. Similarly, higher growth rates were observed at lower growth pressures when examined over a range of 50 - 300 Torr. The effect of precursor flow rates was also investigated and demonstrated that the DETe flow rate had little effect on growth rate while changes in W(CO)6 flow rate can be used to directly control growth rate of films. Peaks at ~1340 cm-1 and ~1600 cm-1 were present in the Raman spectra of some films indicating the presence of carbon in the layers resulting from the DETe source. Higher carbon content was observed at higher growth temperatures and growth pressures. This suggests that our growths are becoming limited by parasitic prereactions of our precursors in the gas phase. When precursors react in the gas phase before reaching the substrate surface, they form carbon containing species which deposit, thus limiting the available reactants to interact on the surface and form WTe2. X-ray diffraction (XRD) and transmission electron microscopy (TEM) analysis further indicate that films are hexagonal and exhibit the layered 1T’ structure. XPS studies over a period of a few weeks reveals that films do not readily oxidize and are quite stable.

MOCVD Growth of Tungsten Ditelluride Thin Films

Abstract Body: We recently demonstrated a non-volatile, two-dimensional (2D) crystal random access memory (RAM) using a monolayer electrolyte1 consisting of cobalt crown ether phthalocyanine (CoCrPc) and lithium salt. Each CoCrPc molecule includes four crown ethers that each solvate one lithium ion and form an ordered array on 2D crystals including graphene, WSe2 and MoS2. The electrolyte is deposited by drop casting from solvent followed by annealing in argon2. The key mechanism of the nonvolatile memory is the toggling of lithium ions back and forth through the crown ether cavity by an applied electrical field. The positioning of the ions near the semiconductor surface results in electric double layer (EDL) gating which creates a low resistance (ON) state; when ions are moved away from the semiconductor surface, a high resistance (OFF) state is created3. Our published work primarily focused on the combination of 15-crown 5-ether (15C5) CoCrPc and LiClO4 where the salt is deposited by drop-casting in ethanol. However, this salt-solvent combination increased the number of features on the semiconductor surface resembling aggregates of CoCrPc and/or lithium salt. Literature indicates additional combinations of lithium salts (such as LiCl and LiI) and solvents that promote the complexation between 15C5 and Li+. Therefore, in this study we explore additional salt-solvent pairs to decrease the size and density of the aggregates or eliminate them entirely. The quality of the deposition can be characterized by root mean square roughness (Rq), skewness (Rsk), and kurtosis (Rku) using atomic force microscope (AFM) topological scans. In this study, WSe2 flakes were exfoliated on p-type Si (90 nm SiO2) and a monolayer of 15C5 CoCrPc was deposited on the flake surfaces. To isolate the impact of anion identity on the monolayer quality, we kept the deposition solvent constant as ethanol while varying the lithium anions: LiClO4, LiCl, and LiI. To isolate the impact of solvent identity, we kept the salt, LiClO4, constant and varied the solvent from ethanol to acetone and acetonitrile (note that acetone and acetonitrile were chosen for their reported tendency to promote ion-(15C5) crown complexation4.) The monolayer quality is evaluated using AFM in an Argon-filled glovebox with water and oxygen concentration < 0.6 ppm. Among the three salts, LiCl in ethanol gives the most homogenous monolayer with a Rq,LiCl = 0.25 ± 0.01 nm. Specifically, with ethanol as the solvent, LiCl gives a monolayer that is 2.4 and 6.2 x less rough than LiClO4 and LiI, respectively. The skewness of LiCl (Rsk,LiCl = 0.15 ± 0.01) is close to zero indicating that the surface topology is relatively flat, which is also consistent with the small surface roughness of 2.5 angstrom. Among the three solvents, we observed that acetone gives the best LiClO4 deposition with the lowest Rq (0.42 ± 0.05 nm), which is ~1.5 and 3 x lower than ethanol and acetonitrile, respectively. Also, the skewness (Rsk,acetone = 0.72 ± 0.24) and the kurtosis (Rku,acetone = 5.23 ± 0.31) were approximately 1.5 times lower than the other two solvents. These data were taken by averaging over six, 200 x 200 nm locations on each flake. The data indicate LiCl and acetone as the most promising salt-solvent combination; these results will be reported in the talk. This work is supported by the NSF under Grant # NSF-DMR-EPM CAREER: 1847808. (1) Liang, et. al., Nano Lett. 2019, 19 (12), 8911–8919. (2) Lu, et.al., J. Phys. Chem. C 2015, 119 (38), 21992–22000. (3) Xu, et. al., ACS Nano 2017, 11 (6), 5453–5464. (4) Izatt, et. al., Chem. Rev. 1985, 85 (4), 271–339.

Photonic Curing of Solution-Processed Indium Zinc Oxide Thin-Film Transistors

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