United States

Ferroelectric, FTJ, tunnel junction, neuromorphic, memory

DRC 2021

Process dependent ferroelectric switching in Metal-Ferroelectric-Dielectric-Metal FTJ stack

tunnel junction

ferroelectric

neuromorphic

memory

#### Welcome to the 60th IEEE International Reliability Physics Symposium (IRPS)!

[![](https://assets.underline.io/uploads/markdown_image/1/image/f6b8cf9ecca2209dd3e0fcebe80a2915.png)](https://underline.io/events/282/reception) [![](https://assets.underline.io/uploads/markdown_image/1/image/e787ff477f8d2b687fb0b54d83d35e11.png)](https://drive.google.com/drive/folders/1GAycr7pPrZG2ZzZP-geUL8vGWswjCB1N?usp=sharing) [![](https://assets.underline.io/uploads/markdown_image/1/image/7492fafcc0c623afe96fe15207855ed9.png)](https://www.irps.org/)
 

**General Chair Welcome Message**

Welcome to IRPS 2022! When the IRPS Management Committee began making plans for Dallas, we recognized the strong desire by the reliability physics community to return to a face-to-face symposium that we last had in Monterey in 2019. But as time progressed, we recognized that travel restrictions were not being lifted as rapidly as we anticipated. Rather than leave out those of you who could not attend in person, we adopted a hybrid format allowing for both remote attendance and remote presentations. This is a first for IRPS and I am confident it will be a success for all.

With this new hybrid format, the symposium will return to the original five-day format with Tutorials and Year in Review on the first two days. The Technical Program, Keynote Talks, Workshops and Poster session will be held on the following three days. All of these (except Workshops and Posters) will be available via real-time streaming in the US Central Time zone with virtual attendees having Q&A access to the presenters. For those virtual attendees who cannot watch the live presentations, the material will be available on demand to all attendees for a month after the symposium with the ability to communicate with the authors.

In 2020, we were planning on co-hosting the International ESD Workshop (IEW) ESD workshop when the COVID-19 pandemic hit. For 2022, IEW will be seamlessly embedded into the IRPS Program and will sponsor three tutorials, an invited talk, two technical sessions and two evening workshops focused on ESD and latch-up. And we continue our
collaboration with our sister conference, European Symposium on Reliability of Electron Devices Failure Physics and Analysis (ESREF) by hosting their Best Paper and the International Integrated Reliability Workshop (IIRW) by hosting their Best Student Paper.

Our primary objective is to maintain the symposium’s leadership role in the reliability physics of microelectronic devices by attracting leading researchers to present their work and providing attendees the best place to access this information. With all the buzz in the media about whether Moore’s Law has hit its limit, IRPS has been promoting expertise developed in silicon-based reliability over the past sixty years and expanding into new material areas. This year, eight of the technical sessions are devoted to reliability in topics outside of traditional silicon, including wide bandgap GaN/SiC, emerging memory and neuromorphic computing. I hope our ability to draw these communities together will accelerate the cross-fertilization of ideas. 

The Technical Program consists of four keynote speakers, twenty-three invited speakers and eighty-seven oral presentations organized in thirty technical sessions on eighteen reliability topics. Over two evenings, there will be ten Workshops and sixty-six Poster presentations that are designed to allow in person attendees and experts to interact
with one another. With eighteen tutorials covering topics ranging from fundamental transistor and memory reliability all the way up to automotive and complex system-level reliability, this year’s symposium provides an excellent learning opportunity for engineers and scientists new to reliability as well as experienced individuals wanting to explore new
areas. The Year in Review, which serves as a summary of research in the past year, will cover 3D packaging, emerging memory and aging aware circuit designs.

Finally, I would like to express my extreme gratitude to our patrons and exhibitors, whose support makes IRPS possible.
And to all of you, our in person and virtual attendees, for supporting this symposium for sixty years!

**Charles W. Slayman, General Chair** 
**of 2022 IRPS Management Committee**
 
**About IRPS**

The IEEE International Reliability Physics Symposium (IRPS) is the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all parts of the world, IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic assemblies through an improved understanding of both the physics of failure as well as the application environment. IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability, and to meet and network with reliability colleagues from around the world.

Please log in to explore this event. You need to log in with the email address you registered with. Access credentials have been sent to your email. 

Please log in to explore this event.

Registration for this conference has now closed. We appreciate your interest and hope to welcome you at a future event. If you’d like to hear about similar upcoming events, please check our website or join our mailing list.

Registration for this conference has now closed.

IRPS 2022 Main Conference 

IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability. It is also an outstanding chance to meet and network with reliability colleagues from around the world.

poster

**[DOWNLOAD THE DRC 2021 DIGEST](https://drive.google.com/file/d/17_-pkYf4IBbVuNYgohTf0iZJORVGp_uN/view?usp=sharing)**

**[DOWNLOAD A COPY OF THE FINAL DRC PROGRAM](https://drive.google.com/file/d/1Ek8UIDCowpLq0z2hXav5tn67FboxS03N/view?usp=sharing)**

For almost eight decades, the Device Research Conference (DRC) has brought together leading scientists, researchers and students to share their latest discoveries in device science, technology and modeling. Notably, many of the first public disclosures of key device technologies were made at the DRC. This year marks the 79th anniversary of the DRC—the longest running device research meeting in the world. As we commemorate this meeting, the high-caliber technical sessions will be highlighted by plenary talks and invited talks by international research pioneers and leaders behind modern electronic technology.

Given the ongoing global health concerns associated with COVID-19 (Coronavirus), the DRC leadership has decided to hold the 2021 Device Research Conference in a virtual (online) format. This follows an enormously successful 2020 DRC held virtually, in which we had record attendance and worldwide participation of more than 875 attendees from 33 countries.

The 2021 Conference will feature:

* Informative, timely short courses in rapidly developing fields
* Oral and poster presentations on electronic/photonic device experiments and simulations
* Plenary and invited presentations given by worldwide leaders
* Evening “rump” session
* Strong student participation and Student Paper Awards

DRC is held in coordination with the Electronic Materials Conference (EMC), which will occur the same week, from June 23-25. As has happened in person in past years, in 2021, the virtual DRC and EMC sessions on the shared day, Wednesday, June 23, will be open to all attendees from both conferences. This recognizes the strong interaction between device and electronic materials research and provides fruitful exchanges of information between attendees of both Conferences. For information on the 63rd Electronic Materials Conference, please visit the [EMC 2021 website.](https://www.mrs.org/63rd-emc/)

2021 DRC individual presentation videos will become available in Underline at the end of each technical session. A recording of each full live session with Q&A will be posted later during the conference. To facilitate re-viewing of recorded talks and sessions, the DRC Underline site will remain open through 11:59pm (US EDT) on July 7th. DRC Conference registration will remain open at www.mrs.org/drc-2021/registration through June 30th.

Thank you for joining us at the 2021 Device Research Conference!

**General Chair**
 Zhihong Chen, Purdue University

**Technical Program Chair**
 Becky (R.L.) Peterson, University of Michigan

**Technical Program Vice-Chair**
 Gregg Jessen, BAE Systems

You can register for the 79th Device Research Conference with the following link. https://www.mrs.org/drc-2021

For almost eight decades, the Device Research Conference (DRC) has brought together leading scientists, researchers and students to share their latest discoveries in device science, technology and modeling. Notably, many of the first public disclosures of key device technologies were made at the DRC. This year marks the 79th anniversary of the DRC—the longest running device research meeting in the world. As we commemorate this meeting, the high-caliber technical sessions will be highlighted by plenary talks and invited talks by international research pioneers and leaders behind modern electronic technology.

The objective of this work is to develop lateral 4H-SiC power devices that could be integrated into a monolithic high voltage power IC (HVIC) chip using thin RESURF layer. Junction isolation structure between neighboring devices can be easily achieved through mesa etch. This paper proposes a high breakdown voltage lateral RESURF MESFET structure and edge termination technique using epitaxially grown thin RESURF wafer.

Design and fabrication of low pinch-off voltage 700V lateral 4H-SiC MESFET with thin RESURF layer

In this work, we present the first vertical GaN finFETs designed for RF performance. A record fmax for vertical GaN transistors is reported, and our results show a promising future for vertical GaN devices in both RF and power electronics.

Small-Signal, High Frequency Performance of Vertial GaN FinFETs with fmax=5.9 GHz

Field-Emission Enhanced Contacts for Disordered Semiconductor based Thin-Film Transistors

For the first time, we have developed CuAg/Al2O3/CuAg selector by magnetron sputtering and ALD processes, which possesses bidirectional threshold switching, steep switching slope and high selectivity (~100000). The superior selectivity and stability of the CuAg/Al2O3/CuAg selector compared to pure Ag or pure Cu as symmetrical electrodes corroborates the interface optimization of the alloying electrodes. This device provides new opportunities for neuromorphic computing and 3D stacking of RRAMs.

CuAg/Al2O3/CuAg Threshold Switching Selector for RRAM Applications

In this work, we analyze interconnects with TaS2 barrier/liner by (a) building a 3D modeling framework for the line metals and vias, (b)integrating the model with the comprehensive circuit simulation flow based on synthesis and place-and-route and (c) evaluating the resistance of different levels of metals (M1-M9) and vias (V1-V8) and the circuit implications of TaS2-augmented interconnects in comparison with the conventional interconnects.

Modeling and Circuit Analysis of Interconnects with TaS2 Barrier/Liner

We propose our original graphene-based device structure and demonstrate its capability of fast, sensitive THz detection. We fabricated an ADGG-GFET and experimentally demonstrated that it works as a high speed, highly sensitive THz detector. These results indicate that the ADGG-GFET has capability to apply to large-capacity high-speed wireless communication system.

Fast terahertz detection by asymmetric dual-grating-gate graphene FET

Al-Rich AlGaN 3D nanosheet transistors are an ideal candidate for efficient power amplification at high frequencies. In this work, we perform a electrostatic equilibrium simulation of an AlGaN MOSFET and MOSHEMT structure by solving the 1D Schrödinger-Poisson equation. By coupling the electrostatics simulations with a virtual-source based transport model, we show that the 3D AlGaN transistors are capable of delivering >5 mA/um output current and >5 W/mm power density per nanosheet at a cutoff frequency of >150 GHz.

Modeling-based design and benchmarking of Al-rich AlGaN 3D nanosheet MOSFET and MOSHEMTs for RF Applications

Record high reverse breakdown at high temperatures were demonstrated, which is a significant advance for high temperature switching applications for β-Ga2O3.

Operation Up to 600K of Vertical β-Ga2O3 Schottky Rectifier With 754V Reverse Breakdown Voltage

ferroelectrics, charge trap, nonvolatile memory, HfO2, HfN, Si, ECR-plasma sputtering

Ferroelectric Nondoped HfO2 Blocking Layer Formation for Hf-based FeNOS Analog Memory Applications

Ferroelectric, varactor, hysteresis, S-parameter

Downloads

Next from DRC 2021

Design and fabrication of low pinch-off voltage 700V lateral 4H-SiC MESFET with thin RESURF layer

Similar lecture

Understanding the Reliability of Ferroelectric Tunnel Junction Operations using an Advanced Small-Signal Model

Stay up to date with the latest Underline news!

PRESENTATIONS

CONFERENCES

COMPANY

RESOURCES