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In this paper, we propose AMS-IO-Agent, a domain-specialized LLM-based agent for structure-aware analog and mixed-signal (AMS) input/output (I/O) generation, to address the challenges of manual and error-prone I/O subsystem design in AMS integrated circuits (ICs), and AMS-IO-Bench, to evaluate design results. I/O subsystems are critical for all IC chips, but their implementation remains largely manual due to intricate, project-specific requirements. AMS-IO-Agent integrates two core capabilities: (1) a structured domain knowledge base built from fragmented engineering practices, capturing reusable constraints and layout conventions; (2) design intent structuring, which converts ambiguous design intent into verifiable logic steps using JSON and Python as intermediate formats. Furthermore, we introduce AMS-IO-Bench, a benchmark for wirebond-packaged AMS I/O rings, used to assess the correctness, adaptability, and efficiency of generated designs. Experimental results demonstrate that AMS-IO-Agent produces practical I/O designs while reducing manual workload and improving turnaround time. On AMS-IO-Bench, AMS-IO-Agent achieves over 70% DRC+LVS signoff pass rate and reduces design turnaround time from days to minutes, significantly outperforming baseline LLM approaches. Furthermore, we validated our system in real industrial tape-out projects, where agent-generated I/O rings were successfully fabricated and tested on silicon, demonstrating the practical effectiveness of our approach in commercial chip design flows.