Welcoming Session to ESSCIRC/ESSDERC 2021

**General Chair:** Thomas Ernst and Dominique Thomas, ESSCIRC ESSDERC 2021 (live from Minatec)

**Presentations and Speeches by:** Kenneth O, SSCS President; Ravi M. Todi, EDS President; Andreia Cathelin, ESSCIRC TPC Chair; François Andrieu, ESSDERC TPC Chair


AOL-1: Opening Welcome

Live Plenary Discussion

### **Artificial Intelligence: Why Moving It to the Edge?**

**Speaker:** Joël Hartmann, STMicroelectronics

**Session Chairs:** Andreia Cathelin, STMicroelectronics; Thomas Ernst, CEA-Leti, Grenoble

This keynote is describing the evolution of Artificial Intelligence (AI) adoption to the Edge for maximizing Data processing at the User experience level to treat as much as possible data analysis without saturating Internet traffic and Cloud data centers. Evolution of Neural Network (NN) computing through progressive usage of In Memory Computing (IMC) is also described. A few examples of Artificial Intelligence at the Edge are also commented. We then describe how at ST, we address competitive solutions for Edge AI thanks to differentiated FD-SOI CMOS technology, Phase Change Memory (PCM) embedded memory integration and advanced NN and IMC design solutions.

A1L-1: Joint Plenary 1

### Overcoming the Data Deluge Challenges with Greener Electronics

**Speaker:** Jean-René Léquepeys, CEA-Leti

**Session Chairs:** 

François Andrieu, ESSDERC TPC Chair, CEA-Leti 
Dominique Thomas, ESSCIRC Conference Chair, STMicroelectronics

The purpose of this paper is to propose scientific and technical directions to reach global data and power sobriety while preserving computational efficiency. We present nine opportunities to lower the power consumption of computing units. A growth factor of 100 to 1000 in energy efficiency is achievable in the next 10 years if we take full advantage of all the potential improvements, working simultaneously at all five levels of the technological ecosystem (process steps, circuits, architecture, software and algorithms).

A2L-1: Joint Plenary 2

Live Plenary Discussion

### Architecting the Human Intranet

**Speaker:** Jan M. Rabaey, UC Berkeley 

**Session Chairs:** Andreia Cathelin,  ESSCIRC TPC Chair, STMicroelectronics; François Andrieu, ESSDERC TPC Chair, CEA-Leti

A3L-1: Joint Plenary 3

**Panelists:** Joël Hartmann, Jean-René Léquepeys, Jan Rabaey 
**Moderators:** François Andrieu, Andreia Cathelin 
**When:** Monday Sept 13th, 17.15-18.15 CEST

A4L-1: IoT - today, tomorrow and the day after tomorrow (Panel)

**Session Chairs:** Antoine Dupret, CEA; Robert Henderson, University of Edinburgh

B1L-1: Imaging Arrays & Detectors

**Session Chairs:** Makoto Ikeda, University of Tokyo; Sugako Otani, Renesas Electronics Corporation

B1L-2: Digital Design Solutions Including AI/ML Techniques (ESSCIRC 2020 SSC-L special edition)

**Session Chairs:** Andreia Cathelin, STM Electronics; Qiuting Huang ETH Zürich

B1L-3: A-SSCC 2020 Guest Invited Papers

**Session Chairs:** Pavel Horsky, ON Semiconductor; Piotr Kmon, kmon@agh.edu.pl

B1L-4:Analog & Power Management (ESSCIRC 2020 SSC-L special edition)

**Session Chairs:** Mikael Ostling, KTH Royal Institute of Technology in Stockholm; Frederic Allibert, SOITEC;

B1L-5: RF Si-based Devices

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.

Highlights:
* 3 joint keynote presentations
* 3 keynote presentations ESSCIRC
* 3 keynote presentations ESSDERC
* Invited papers with overall coverage of all aspects of advanced devices and circuits
* Presentation of IEEE and ESSCIRC/ESSDERC Awards
* Educational Events

JOINT PLENARY talks live broadcast: September 13, 2021 
ESSCIRC and ESSDERC KEYNOTE talks live broadcast: September 15, 2021 
LIVE Q&A INTERACTIVE sessions for all Conference Technical sessions: September 14 – 16 – 17, 2021 
LIVE Q&A INTERACTIVE sessions for all Educational Events: September 20-21-22, 2021 
(on demand videos available from September 6 until November 30, 2021)

**Please see here for the [ESSCIRC Guide](https://drive.google.com/file/d/10dghzuv4aQBty4QfTIY9Q8hXyqsue8Le/view?usp=sharing), [ESSDERC Guide](https://drive.google.com/file/d/10dx9y2tm9cHPDa4upNUYjfXCf44aPry5/view?usp=sharing), and the [Program at a Glance](https://drive.google.com/file/d/10eU0OLTXEpiNzI5hkqv4mSr43T8cedPP/view?usp=sharing)**

To access ESSCIRC ESSDERC 2021, you must pre-register for the conference.  Instructions on how to access the event will be provided directly to attendees and included on the ESSCIRC ESSDERC conference website. [Register now](https://www.esscirc-essderc2021.org/).

Please register for the ESSCIRC conference to join the event.

ESSCIRC ESSDERC 2021

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.





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